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Impact of Strategic Approaches for Improving the Device Performance of Mesa-shaped Nanoscale Vertical-Channel Thin-Film Transistors Using Atomic-Layer Deposited In–Ga–Zn–O Channel Layers

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Abstract

The effect of two strategic approaches, such as modification of active layer geometry and control of active channel composition, were investigated to improve the on/off ratio (ION/IOFF) and field-effect mobility (µFE) of mesa-shaped nanoscale vertical-channel thin-film-transistor (VTFT). The SiO2 spacer was deposited by using plasma-enhanced chemical vapor deposition and patterned via plasma etching process with Ar/CF4 gas mixtures to form a vertical sidewall, corresponding to a channel length of 170 nm. The gate-stack structures including an In–Ga–Zn–O (IGZO) active layer were deposited by atomic layer deposition with a complete conformality along the spacer sidewall. The ION/IOFF of the IGZO VTFT was significantly enhanced from 6.7 × 103 to 2.1 × 109 by lowering the off-state current when the layout geometry of active layer was properly designed to eliminate the uncontrolled current path between the vertically separated source and drain (S/D) electrodes. Furthermore, the µFE was improved from 0.3 to 2.2 cm2/Vs by enhancing the ION when the In/Ga ratio increased to 1.4 by controlling the In contents within the IGZO active channel. The device also showed robust stabilities under positive/negative gate-bias stresses at 2 MV/cm for 104 s. However, still low a µFE was suggested to originate from two detrimental issues of back-channel effects on spacer sidewall and contact resistance between the channel and S/D electrodes. Alternatively, it was confirmed that the increase in indium contents within the IGZO channel could be a useful way to reduce the contact resistance between the channel and S/D electrodes.

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Acknowledgements

This work was partly supported by the Technology Innovation Program (20010402, Development of non-planar TFT structures and processes for ultra high resolution display) funded By the Ministry of Trade, Industry and Energy (MOTIE, Korea), and by the National Research Foundation of Korea (NRF) Grant funded by the Korea Government (MSIT) (NRF-2020M3H4A3081897).

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Authors and Affiliations

  1. Department of Advanced Materials Engineering for Information and Electronics, Kyung Hee University, Yongin, Gyeonggi-do, 17104, Korea

    Hyun-Min Ahn & Sung-Min Yoon

  2. NCD Co., Ltd., Daejeon, 34015, Korea

    Young-Ha Kwon, Nak-Jin Seong & Kyu-Jeong Choi

  3. ICT Creative Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon, 34129, Korea

    Chi-Sun Hwang

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  1. Hyun-Min Ahn
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Ahn, HM., Kwon, YH., Seong, NJ. et al. Impact of Strategic Approaches for Improving the Device Performance of Mesa-shaped Nanoscale Vertical-Channel Thin-Film Transistors Using Atomic-Layer Deposited In–Ga–Zn–O Channel Layers. Electron. Mater. Lett. 18, 294–303 (2022). https://doi.org/10.1007/s13391-022-00336-w

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