Investigation of the instability of low-temperature poly-silicon thin film transistors under a negative bias temperature stress

Abstract

In this work, we analyzed and correlated the hysteresis characteristics and instability under negative bias temperature instability (NBTI) stress in p-channel low-temperature poly-silicon (LTPS) thin-film transistors (TFTs). Positive V _TH shifts were observed under the NBTI stress. The hysteresis does not appear to be affected by the NBTI stress; however, when the VG stress voltage is −40 V at 100°C, the hysteresis increases as the stress time increases and V _TH shifts with sub-threshold slope (SS) degradation. The hysteresis may increase under the extreme stress condition due to the generation of trap-states.