Abstract
In this paper, we have studied effect of localised charges on performance of UTBB FDSOI FET. Purpose behind this work is to understand the performance of UTBB FDSOI FET under the influence of interface trap charges which are generated due to radiation or stress induced damage. These localised charges may affect operating point of transistor and affect the circuit reliability. Various figure of merits such as transconductance, second order transconductance, drain conductance and RF parameters like cut off frequency and gain bandwidth product have been studied in presence of localised charges. It is found that the interface trap affects the performance in subthreshold region more severely as compared to triode and saturation region. These charges always reside in interface between silicon and silicon di oxide, hence study of devices with these charges are essential in order to optimize the effect of these charges accordingly.
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Data Availability
The datasets generated during and/or analyzed during the current study are available from the corresponding author on reasonable request.
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All authors contributed to the study conception and design. Material preparation, data collection and analysis were performed by [Dr. Bhaskar Awadhiya], [Dr. Shivendra Yadav], and [Abhishek Acharya]. The first draft of the manuscript was written by [Dr. Bhaskar Awadhiya] and all authors commented, verified, checked and add on value to the previous versions of the manuscript by various means. All authors read and approved the final manuscript.
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Awadhiya, B., Yadav, S. & Acharya, A. Interface Trap Charges Analysis on DC and High Frequency Characteristics of UTBB-FDSOI FET. Silicon 15, 937–942 (2023). https://doi.org/10.1007/s12633-022-02053-3
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DOI: https://doi.org/10.1007/s12633-022-02053-3