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Subthreshold Current Modeling of Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctionless MOSFET for Low Power Applications

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Abstract

Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctionless MOSFET has been explored for low power applications. This paper presents an analytical model of subthreshold current of Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctionless MOSFET. The analytical results are compared with TMSG MOSFET and good agreement was obtained. The sub-threshold current of the device is very low and is considered for the implementation of CMOS inverter. A PMOS transistor is designed and the drive current of the PMOS transistor is tuned with the NMOS device to obtain the ideal matching in the drive current. A CMOS inverter has been designed. The transient and DC behavior of the device have been examined. The power dissipation of the CMOS inverter has been computed and compared with the CMOS DMG-SOI JLT inverter. The power dissipation is found to be 5 times less for the proposed device as compared to the CMOS DMG-SOI JLT inverter. This exhibits an excellent improvement in power dissipation which is useful for making low-power future generation devices.

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Data Availability

The datasets generated and analyzed during the current study are not publicly available but may be available from the corresponding author on reasonable request.

Code Availability

The code used during this work is not available.

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Authors and Affiliations

  1. Department of Electronics & Communication Engineering, J.C. Bose University of Science & Technology, YMCA, Sector 6, Faridabad, 121006, India

    Prashant Kumar & Munish Vashisht

  2. Department of Electronics & Communication Engineering, Amity University Haryana, Gurugram, 122413, India

    Neeraj Gupta

  3. Department of Computer Science & Engineering, Amity University Haryana, 122413, Gurugram, India

    Rashmi Gupta

Authors
  1. Prashant Kumar
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  2. Munish Vashisht
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  3. Neeraj Gupta
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  4. Rashmi Gupta
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Contributions

The idea of the research was conceptualized by Prashant Kumar and Munish Vashisht carried out the analytical modeling and simulation of junctionless MOSFET. The formal analysis and resources for the research were arranged by Neeraj Gupta and Rashmi Gupta. Prashant Kumar also prepared the original draft of the paper and Neeraj Gupta did the review, proofreading and necessary editing in the article.

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Correspondence to Neeraj Gupta.

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Kumar, P., Vashisht, M., Gupta, N. et al. Subthreshold Current Modeling of Stacked Dielectric Triple Material Cylindrical Gate All Around (SD-TM-CGAA) Junctionless MOSFET for Low Power Applications. Silicon 14, 6261–6269 (2022). https://doi.org/10.1007/s12633-021-01399-4

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