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Analytical modeling of dual-metal gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET

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Abstract

This paper proposes a physics-based 2-D analytical model for a dual- material gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET. Analytical modeling is performed using 2-D Poisson’s equation in cylindrical co-ordinate system based upon parabolic potential approximation. This analysis derives the expressions for center potential, electric field, subthreshold drain current, transconductance, output conductance and switching speed. It is seen that this device possesses enhanced drain current, higher transconductance and lower output conductance. The gate-induced drain leakage current for this device has also been investigated. The subthreshold slope of this device is approximately 71 mV/ decade and Ion/Ioff ratio is also high, which leads to its usage for low power and high speed switching applications. The electrical characteristics and short channel effects of this device are also examined for different gate stack materials. It is observed that the device characteristics improve when permittivity of the gate stack is increased. Further, the results acquired using analytical modeling is mapped with the simulated data results to affirm and validate the device model structure. The simulation is implemented using ATLAS-3D device simulator.

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Acknowledgements

Authors convey their humble gratitude toward the Director, Maharaja Agrasen Institute of Technology (MAIT), Delhi for giving the required provisions for performing this work.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, Delhi Technological University, Shahbad Daulatpur, Delhi, 110042, India

    Sumedha Gupta & Neeta Pandey

  2. Department of Electronics and Communication Engineering, Maharaja Agrasen Institute of Technology, Rohini, Delhi, 110086, India

    R. S. Gupta

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  1. Sumedha Gupta
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  2. Neeta Pandey
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  3. R. S. Gupta
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Correspondence to Sumedha Gupta.

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Gupta, S., Pandey, N. & Gupta, R.S. Analytical modeling of dual-metal gate stack engineered junctionless accumulation-mode cylindrical surrounding gate (DMGSE-JAM-CSG) MOSFET. Appl. Phys. A 127, 520 (2021). https://doi.org/10.1007/s00339-021-04652-0

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