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Effect of Substrate Induced Surface Potential (SISP) on Threshold Voltage of SOI Junction-Less Field Effect Transistor (JLFET)

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Abstract

In the present paper, a threshold voltage model of short channel silicon-on-insulator (SOI) Junctionless Field Effect Transistors (JLFETs) has been presented. The model includes the effect of substrate-induced surface potential (SISP) effect on threshold voltage with necessary changes in the boundary conditions at the silicon-buried oxide (BOX) interface. Such changes render difference in potential between substrate bulk and surface. The channel potential has been modelled using the parabolic approximation method. The developed model is useful for the optimization of short-channel effects for SOI JLFETs. The substrate bias voltage as a fourth terminal is found to be a powerful tool for tuning the threshold voltage for different device parameters variation. The model results are in good agreement with the simulation results obtained from Sentaurus TCAD simulator.

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Authors and Affiliations

  1. Department of Electronics Engineering, Rajasthan Technical University, Kota, 324 010, India

    Vijay Kumar Dixit, Rajeev Gupta & Vaibhav Purwar

  2. Department of Electrical Engineering, Indian Institute of Technology Patna, Bihar, India

    P. S. T. N. Srinivas

  3. Department of Physics, L.N.D. College, Motihari (B.R.A. Bihar University, Muzaffarpur), Muzaffarpur, India

    Sarvesh Dubey

Authors
  1. Vijay Kumar Dixit
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  2. Rajeev Gupta
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  3. Vaibhav Purwar
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  4. P. S. T. N. Srinivas
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  5. Sarvesh Dubey
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Correspondence to Sarvesh Dubey.

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Dixit, V.K., Gupta, R., Purwar, V. et al. Effect of Substrate Induced Surface Potential (SISP) on Threshold Voltage of SOI Junction-Less Field Effect Transistor (JLFET). Silicon 12, 921–926 (2020). https://doi.org/10.1007/s12633-019-00185-7

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  • DOI: https://doi.org/10.1007/s12633-019-00185-7

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