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A Tunneling Current Model with a Realistic Barrier for Ultra-Thin High-k Dielectric ZrO2 Material Based MOS Devices

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Abstract

In this paper, a theoretical model to estimate the tunneling current density of ultra-thin MOS devices is presented. First an ideal barrier has been assumed for the modeling. Then development in the results is brought in by taking into account the barrier height lowering due to the image force effect (practical barrier). The SiO2 material with selected high-k dielectric material ZrO2 based MOS structure is used to verify the tunneling current density model against the 2-D device simulator, ATLAS of Silvaco TCAD for a wide variation of oxide thickness and biasing conditions having doping concentration of 5 × 1017 cm− 3. Tunnel resistivity is also evaluated utilizing this tunneling current density model. Excellent agreement between the two are observed.

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Acknowledgments

The authors are highly indebted to Department of Science and Technology (DST), Government of India, for supporting this technical work.

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Authors and Affiliations

  1. Department of Electronics & Communication Engineering, Mizoram University (A Central University), Aizawl, 796004, India

    N. P. Maity & Reshmi Maity

  2. Department of Electronics & Communication Engineering, National Institute of Technology, Silchar, 788 010, India

    N. P. Maity, Reshmi Maity & S. Baishya

Authors
  1. N. P. Maity
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  2. Reshmi Maity
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  3. S. Baishya
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Correspondence to N. P. Maity.

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Maity, N.P., Maity, R. & Baishya, S. A Tunneling Current Model with a Realistic Barrier for Ultra-Thin High-k Dielectric ZrO2 Material Based MOS Devices. Silicon 10, 1645–1652 (2018). https://doi.org/10.1007/s12633-017-9648-4

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  • DOI: https://doi.org/10.1007/s12633-017-9648-4

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