Abstract
Chemical mechanical polishing (CMP) is a semiconductor fabrication process. In this process, wafer surfaces are smoothed and planarized using a hybrid removal mechanism, which consists of a chemical reaction and mechanical removal. In this study, the effects of wafer size on the material removal rate (MRR) and its uniformity in the CMP process were investigated using experiments and a mathematical model proposed in our previous research; this model was used to understand the MRR and its uniformity with respect to wafer size. Under constant process conditions, the MRR of a silicon dioxide (SiO2) film increased slightly along with an increase in wafer size. The increase in MRR may be attributed to the acceleration of the chemical reaction due to a rise in process temperature. Based on the results obtained, the k and α values in the mathematical model are useful parameters for understanding the effect of wafer size on the MRR and its distribution under a uniform, relative velocity. These parameters can facilitate the prediction of CMP results and the effective design of a CMP machine.
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Recommended by Guest Editor Haedo Jeong
Hyunseop Lee received his B.S., M.S., and Ph.D. degrees in Mechanical Engineering from Pusan National University. He is currently a researcher at the School of Mechanical Engineering, Pusan National University, Korea. His studies include (chemical mechanical) polishing of electronic materials and sustainable manufacturing.
Yeongbong Park received his B.S. and M.S. degrees in Mechanical Engineering from Pusan National University, Busan, Korea in 2003 and 2009, respectively. He is currently a Ph.D. student in Mechanical Engineering from the same university. His research interest includes chemical mechanical polishing process of semiconductors.
Sangjik Lee received his B.S. degree in Mechanical Engineering from Pusan National University, Busan, Korea, in 1997. He received his M.S. and Ph.D. degrees in Precision Mechanical Engineering from in the same university in 1999 and in 2010, respectively. He has been a Senior Researcher since 2010. His research interests include ultra-precision machining and systems, process monitoring and simulation, and process integration and optimization.
Haedo Jeong is a professor at the School of Mechanical Engineering at Pusan National University and a CEO of G&P Technology, Korea. He received his B.S. and M.S. degrees from Pusan National University and Korea Advanced Institute of Science and Technology (KAIST), respectively. Then, he received his Ph.D. degree in Mechanical Engineering from Tokyo University, Japan in 1994. His research fields include chemical mechanical polishing (CMP), grinding, polisher and consumable design, and post-CMP cleaning.
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Lee, H., Park, Y., Lee, S. et al. Effect of wafer size on material removal rate and its distribution in chemical mechanical polishing of silicon dioxide film. J Mech Sci Technol 27, 2911–2916 (2013). https://doi.org/10.1007/s12206-013-0802-7
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DOI: https://doi.org/10.1007/s12206-013-0802-7