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Resistorless sub-bandgap CMOS voltage reference based on lateral BJT

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Abstract

This paper presents a low-power sub-bandgap voltage reference. Here, the proportional to absolute temperature (PTAT) voltage obtained from ∆VEB is applied to a subthreshold diode-connected PMOS transistor to yield a current with a positive thermal coefficient (TC). The current is then converted back to a PTAT voltage term using another subthreshold PMOS transistor at the output path. Moreover, utilizing the bipolar transistor achieves a lower process variation VR. A trimming circuit is also applied to improve the TC against the process variation further. Low-power VR is achieved by operating all the MOSFETs under the subthreshold region. The simulation results using the standard 1.8 V, 0.18 µm CMOS process shows a nominal output voltage of 0.75 V, operating from 0.9 V to 1.8 V supply voltage while consuming 41.4 nA at room temperature. The TC is about 21.6 ppm/oC and (σVREF/μVREF) = 1.0 % over a temperature range of 0 °C to 120 °C. In addition, the proposed VR circuit is simulated without a trimming circuit resulting in a reasonable μTC = 29.1 ppm/oC and (σVREF/μVREF) = 1.3%.

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All data needed to evaluate the conclusions in the paper are presented in this paper. All codes are also available upon request.

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Authors and Affiliations

  1. Department of Aviation Electronics, Civil Aviation Technology College, Tehran, Iran

    Mohammad Rashtian

  2. Faculty of Electrical Engineering, Shahid Beheshti University, Tehran, Iran

    Omid Hashemipour

Authors
  1. Mohammad Rashtian
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  2. Omid Hashemipour
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Correspondence to Mohammad Rashtian.

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Rashtian, M., Hashemipour, O. Resistorless sub-bandgap CMOS voltage reference based on lateral BJT. Sādhanā 48, 54 (2023). https://doi.org/10.1007/s12046-023-02102-6

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  • DOI: https://doi.org/10.1007/s12046-023-02102-6

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