Abstract
As dimensions of the metal-oxide-semiconductor field-effect transistor (MOSFET) are scaling down and the thickness of gate oxide is decreased, the gate leakage becomes more and more prominent and has been one of the most important limiting factors to MOSFET and circuits lifetime. Based on reliability theory and experiments, the direct tunneling current in lightly-doped drain (LDD) NMOSFET with 1.4 nm gate oxide fabricated by 90 nm complementary metal oxide semiconductor (CMOS) process was studied in depth. High-precision semiconductor parameter analyzer was used to conduct the tests. Law of variation of the direct tunneling (DT) current with channel length, channel width, measuring voltage, drain bias and reverse substrate bias was revealed. The results show that the change of the DT current obeys index law; there is a linear relationship between gate current and channel dimension; drain bias and substrate bias can reduce the gate current.
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TANG M C, FANG Y K, CHEN D C, YEH C S. Hot-carrier and fowler-nordheim (FN) tunneling stresses on RF reliability of 40-nm PMOSFETs with and without SiGe source/drain [J]. IEEE Transactions on Electron Devices, 2009, 56(4): 678–682.
MAHAPATRA S, SAHA D, VARGHESE D, KUMAR P B. On the generation and recovery of interface traps in MOSFETs subjected to NBTI, FN, and HCI stress [J]. IEEE Transactions on Electron Devices, 2007, 53(7): 1583–1592.
TERAMOTO A, KOBAYASHI K, OHNO Y, SHIGETOMI A. Excess currents induced by hot hole injection and FN electron injection in thin SiO2 films [J]. IEEE Transactions on Electron Devices, 2001, 48 (5): 868–873.
HU Shi-gang, HAO Yue, MA Xiao-hua, CAO Yan-rong, CHEN Chi, WU Xiao-feng. Study on the degradation of NMOSFETs with ultra-thin gate oxide under CHE stress at high temperature [J]. Chinese Physics B, 2009, 18(12): 5479–5484.
HU Shi-gang, HAO Yue, MA Xiao-hua, CAO Yan-rong, CHEN Chi, WU Xiao-feng. Hot-carrier stress effects on GIDL and SILC in LDD-MOSFET with ultra-thin gate oxide [J]. Chinese Physics Letters, 2009, 26(1): 017304-1–017304-4.
HU Shi-gang, CAO Yan-rong, HAO Yue, MA Xiao-hua, CHEN Chi, WU Xiao-feng, ZHOU Qing-jun. Degradation of ultra-thin gate oxide NMOSFETs under CVDT and SHE stress [J]. Chinese Physics Letters, 2008, 25(11): 4109–4112.
CHEN Wei-bing, XU Jing-ping, ZOU Xiao, LI Yan-ping, XU Sheng-guo, HU Zhi-fu. Analytic tunneling-current model of small-scale MOSFETs [J]. Acta Physica Sinica, 2006, 55(10): 5036–5040. (in Chinese)
SASAKI H, ONO M, YOSHITOMI T, OHGURO T, NAKAMORA S, SAITO M, IWAI H. 1.5 nm direct-tunneling gate oxide Si MOSFET’s [J]. IEEE Transactions on Electron Devices, 1996, 43(8): 1233–1242.
YANG N, HENSON W K, HAUSER J R, WORTMAN J J. Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices [J]. IEEE Transactions on Electron Devices, 1999, 46(7): 1464–1471.
CHOI C H, NAM K Y, YU Z P, DUTTON R W. Impact of gate direct tunneling current on circuit performance: A simulation study [J]. IEEE Transactions on Electron Devices, 2001, 48(12): 2823–2829.
MONDAL I, DUTTA A K. An analytical gate tunneling current model for MOSFETs having ultrathin gate oxides [J]. IEEE Transactions on Electron Devices, 2008, 55(7): 1682–1692.
LIN C H, KUO J B, SU K W, LIU S. Partitioned gate tunneling current model considering distributed effect for CMOS devices with ultra-thin gate oxide [J]. Electronics Letters, 2006, 42(3): 182–184.
SATHAIYA D M, KARMALKAR S. Edge effects on gate tunneling current in HEMTs [J]. IEEE Transactions on Electron Devices, 2007, 54(10): 2614–2622.
VIANELLO E, DRIUSSI F, ESSENI D, SELMI L, WIDDERSHOVEN F, VAN DUUREN M J. Explanation of SILC probability density distributions with nonuniform generation of traps in the tunnel oxide of flash memory arrays [J]. IEEE Transactions on Electron Devices, 2007, 54(8): 1953–1962.
DRIUSSI F, WIDDERSHOVEN F, ESSENI D, SELMI L, VAN DUUREN M J. Experimental characterization of statistically independent defects in gate dielectrics-part I: Description and validation of the model [J]. IEEE Transactions on Electron Devices, 2005, 52(5): 942–948.
RANUAREZ J C, DEEN M J, CHEN C C. A Review of gate tunneling current in MOS devices [J]. Microelectronics Reliability, 2006, 46(12): 1939–1956.
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Foundation item: Project(61074051) supported by the National Natural Science Foundation of China; Project(10C0709) supported by the Scientific Research Fund of Education Department of Hunan Province, China; Project(2011GK3058) supported by the Science and Technology Plan of Hunan Province, China
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Hu, Sg., Wu, XF. & Xi, Zf. Gate leakage current of NMOSFET with ultra-thin gate oxide. J. Cent. South Univ. 19, 3105–3109 (2012). https://doi.org/10.1007/s11771-012-1385-7
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DOI: https://doi.org/10.1007/s11771-012-1385-7