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Mixed-grained CMOS field programmable analog array for smart sensory applications

  • Published:
Journal of Electronics (China)

Abstract

The drive towards shorter design cycles for analog integrated circuits has given impetus to the development of Field Programmable Analog Arrays (FPAAs), which are the analogue counterparts of Field Programmable Gate Arrays (FPGAs). In this paper, we present a new design methodology which using FPAA as a powerful analog front-end processing platform in the smart sensory microsystem. The proposed FPAA contains 16 homogeneous mixed-grained Configurable Analog Blocks (CABs) which house a variety of processing elements especially the proposed fine-grained Core Configurable Amplifiers (CCAs). The high flexible CABs allow the FPAA operating in both continuous-time and discrete-time approaches suitable to support variety of sensors. To reduce the nonideal parasitic effects and save area, the fat-tree interconnection network is adopted in this FPAA. The functionality of this FPAA is demonstrated through embedding of voltage and capacitive sensor signal readout circuits and a configurable band pass filter. The minimal detectable voltage and capacitor achieves 38 uV and 8.3 aF respectively within 100 Hz sensor bandwidth. The power consumption comparison of CCA in three applications shows that the FPAA has high power efficiency. And the simulation results also show that the FPAA has good tolerance with wide PVT variations.

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References

  1. W. Carter, K. Duong, R. H. Freeman, H. Hsieh, J. Y. Ja, J. E. Mahoney, L. T. Ngo, and S. L. Sze. A user programmable reconfiguration gate array. Proceedings of the IEEE Custom Integrated Circuits Conference, Rochester Riverside Convention Center, Rochester New York, May 1986, 233–235.

  2. M. A Sivilotti. A dynamically configurable architecture for prototyping analog circuits. Proceedings of the fifth MIT Conference on Advanced Research in VLSI, MIT Press, Cambridge, Massachusetts, USA, 1988, 237–258.

    Google Scholar 

  3. Craig R. Schlottmann, Samuel Shapero, Stephen Nease, and Paul Hasler. A digitally enhanced dynamically reconfigurable analog platform for low-power signal processing. IEEE Journal of Solid-State Circuits, 47(2012)9, 2174–2184.

    Article  Google Scholar 

  4. Daniel Fernández, Luís Martínez-Alvarado, and Jordi Madrenas. A translinear log-domain FPAA on standard CMOS technology. IEEE Journal of Solid-State Circuits, 47(2012)2, 490–503.

    Article  Google Scholar 

  5. Luiz Carlos Gouveia, Thomas Jacob Koickal, and Alister Hamilton. An asynchronous spike event coding scheme for programmable analog arrays. IEEE Transactions on Circuits and Systems-I: regular papers, 58(2011)4, 791–799.

    Article  MathSciNet  Google Scholar 

  6. T. J. Freeborn, B. Maundy, and A. S. Elwakil. Field programmable analogue array implementation of fractional step filters. IET Circuits Devices & Systems, 4(2010)6, 514–524.

    Article  Google Scholar 

  7. Joachim Becker, Fabian Henrici, Stanis Trendelenburg, Maurits Ortmanns, and Yiannos Manoli. A field-programmable analog array of 55 digitally tunable OTAs in a hexagonal lattice. IEEE Journal of Solid-State Circuits, 43(2008)12, 2759–2768.

    Article  Google Scholar 

  8. Paul E. Hasler and Christopher M. Twigg. An OTA-based large-scale field programmable analog array (FPAA) for faster on-chip communication and computation. IEEE International Symposium on Circuits and Systems, New Orleans, USA, May 27–30, 2007, 177–180.

    Chapter  Google Scholar 

  9. Emilio Volpi, Luca Fanucci, Adolfo Giambastiani, Alessandro Rocchi, Francesco D’ Ascoli, Marco Tonarelli, Massimiliano Melani, and Corrado Marino. A mixed-signal embedded platform for automotive sensor conditioning. EURASIP Journal Embedded Systems, 2010(2010), doi:10.1155/2010/945646.

    Google Scholar 

  10. http://www.microsemi.com/products/fpga-soc/soc-fpga/smartfusion, 27 January, 2014.

  11. D. Sukumaran, Y Enyi, Sun Shuo, A Basu, Dongning Zhao, and J. Dauwels. A low-power, reconfigurable smartsensor system for EEG acquisition and classification. 2012 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), China, 2012, 9–12.

    Chapter  Google Scholar 

  12. Cheng Lijun, Zhang Yingtang, Li Zhining, Ren Guoquan, and Li Jianwei. Diesel engine online monitoring based on smart order tracking sensor system. 2011 Third International Conference on Measuring Technology and Mechatronics Automation (ICMTMA), Shanghai, China 2011, Vol. 1, 1079–1082.

    Article  Google Scholar 

  13. C. E. Leiserson. Fat-trees: Universal networks for hardware-efficient supercomputing. IEEE Transactions on Computers, C-34(1985)10, 892–901.

    Article  Google Scholar 

  14. JPL evolvable systems. http://cism.jpl.nasa.gov/ehw/ehwgasia/myweb/index.html.

  15. Jorg Langeheine, Joachim Becker, Simon Folling, Karlheinz Meier, and Johannes Schemmel. Initial studies of a new VLSI field programmable transistor array. Proceedings 4th International Conference on Evolvable Systems: From Biology to Hardware, Tokyo, Japan, October 2001, 62–73.

  16. http://www.anadigm.com/fpaa.asp, 7 January, 2014.

  17. C. C. Enz, and G. C Temes. Circuit techniques for reducing the effects of Op-Amp imperfections: autozeroing, correlated double sampling, and chopper stabilization. Proceedings of the IEEE, 84(1996)11, 1584–1614.

    Article  Google Scholar 

  18. Juan M. Carrillo, J. Francisco Duque-Carrillo, Guido Torelli, and José L. Ausín. Constant-gm Constant-Slew-Rate High-Bandwidth Low-Voltage Rail-to-Rail CMOS Input Stage for VLSI Cell Libraries. IEEE Journal of Solid-State Circuits, 38(2003)8, 1364–1372.

    Article  Google Scholar 

  19. Thomas W. Brown, Terri S. FieZ, and Mikko Hakkarainen. Prediction and characterization of frequency dependent MOS switch linearity and the design implications. IEEE Custom Integrated Circuits Conference, San Jose, CA, USA, 2006.

    Google Scholar 

  20. Zhang Chong, Wu Qisong, Yin Tao, and Yang Haigang. Noise and mismatch optimization for capacitor MEMS readout. Journal of Semiconductors, 30(2009)11, 115003-6.

    Article  Google Scholar 

  21. Richard B. Wunderlich, Farhan Adil, and Paul Hasler. Floating gate-based field programmable mixed-signal array. IEEE Transactions on Very Large Scale Integration (VLSI) System, 21(2013)8, 1496–1505.

    Article  Google Scholar 

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Authors and Affiliations

  1. System on Programmable Chip Research Department, Institute of Electronics, Chinese Academy of Sciences, Beijing, 100190, China

    Xiaoyan Cheng, Haigang Yang, Tao Yin, Qisong Wu, Tian Zhi & Fei Liu

  2. University of Chinese Academy of Sciences, Beijing, 100049, China

    Xiaoyan Cheng & Tian Zhi

  3. Institute of Electronics, Chinese Academy of Sciences, Beijing, 100190, China

    Haigang Yang

Authors
  1. Xiaoyan Cheng
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  2. Haigang Yang
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  3. Tao Yin
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  4. Qisong Wu
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  5. Tian Zhi
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  6. Fei Liu
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Corresponding author

Correspondence to Haigang Yang.

Additional information

Supported by the CAS/SAFEA International Partnership Program for Creative Research Teams, National High Technology Research and Develop Program of China (2012AA012301), and National Science and Technology Major Project of China (2013ZX03006004).

Communication Author: Yang Haigang, born in 1960, male, Doctor

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Cheng, X., Yang, H., Yin, T. et al. Mixed-grained CMOS field programmable analog array for smart sensory applications. J. Electron.(China) 31, 129–142 (2014). https://doi.org/10.1007/s11767-014-3143-5

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  • DOI: https://doi.org/10.1007/s11767-014-3143-5

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