Interface Trap Profiles in 4H- and 6H-SiC MOS Capacitors with Nitrogen- and Phosphorus-Doped Gate Oxides


We report results on the interface trap density (D it) of 4H- and 6H-SiC metal–oxide–semiconductor (MOS) capacitors with different interface chemistries. In addition to pure dry oxidation, we studied interfaces formed by annealing thermal oxides in NO or POCl3. The D it profiles, determined by the Cψ s method, show that, although the as-oxidized 4H-SiC/SiO2 interface has a much higher D it profile than 6H-SiC/SiO2, after postoxidation annealing (POA), both polytypes maintain comparable D it near the conduction band edge for the gate oxides incorporated with nitrogen or phosphorus. Unlike most conventional CV- or Gω-based methods, the Cψ s method is not limited by the maximum probe frequency, therefore taking into account the “fast traps” detected in previous work on 4H-SiC. The results indicate that such fast traps exist near the band edge of 6H-SiC also. For both polytypes, we show that the total interface trap density (N it) integrated from the Cψ s method is several times that obtained from the high–low method. The results suggest that the detected fast traps have a detrimental effect on electron transport in metal–oxide–semiconductor field-effect transistor (MOSFET) channels.

This is a preview of subscription content, log in to check access.


  1. 1.

    D. Okamoto, H. Yano, T. Hatayama, and T. Fuyuk, Appl. Phys. Lett. 96, 203508 (2010).

    Article  Google Scholar 

  2. 2.

    Y. Deng, W. Wang, Q. Fang, M.B. Koushik, and T.P. Chow, J. Electron. Mater. 35, 618–624 (2006).

    Article  Google Scholar 

  3. 3.

    A.F. Basile, J. Rozen, J.R. Williams, L.C. Feldman, and P.M. Mooney, J. Appl. Phys. 109, 064514 (2011).

    Article  Google Scholar 

  4. 4.

    G.Y. Chung, C.C. Tin, J.R. Williams, K. McDonald, R.K. Chanana, R.A. Weller, S.T. Pantelides, L.C. Feldman, O.W. Holland, M.K. Das, and J.W. Palmour, IEEE Electron Device Lett. 22, 176–178 (2001).

    Article  Google Scholar 

  5. 5.

    H. Yoshioka, T. Nakamura, and T. Kimoto, J. Appl. Phys. 111, 014502 (2012).

    Article  Google Scholar 

  6. 6.

    S. Nakazawa, T. Okuda, J. Suda, T. Nakamura, and T. Kimoto, IEEE Electron Device Lett. 62, 309–315 (2015).

    Article  Google Scholar 

  7. 7.

    H. Yoshioka, T. Nakamura, and T. Kimoto, Appl. Phys. Lett. 104, 083516 (2014).

    Article  Google Scholar 

  8. 8.

    E.H. Nicollian and J.R. Brews, MOS Physics and Technology, chap. 8 (Hoboken: Wiley-Interscience, 1982).

    Google Scholar 

  9. 9.

    C. Jiao, A.C. Ahyi, C. Xu, D. Morisette, L.C. Feldman, and S. Dhar, J. Appl. Phys. 119, 155705 (2016).

    Article  Google Scholar 

  10. 10.

    P. Balk and J.M. Eldridge, Proc. IEEE 57, 1558–1563 (1969).

    Article  Google Scholar 

  11. 11.

    R. Schorner, P. Friedrichs, D. Peters, and D. Stephani, IEEE Electron Device Lett. 20, 5 (1999).

    Article  Google Scholar 

  12. 12.

    A.F. Basile, J. Rozen, X.D. Chen, S. Dhar, J.R. Williams, L.C. Feldman, and P.M. Mooney, Mater. Sci. Forum 645–648, 499–502 (2010).

    Article  Google Scholar 

  13. 13.

    J.N. Shenoy, G.L. Chindalore, M.R. Melloch, J.A. Cooper, J.W. Palmour, and K.G. Irvine, J. Electron. Mater. 24, 303–309 (1995).

    Article  Google Scholar 

  14. 14.

    J.A. Cooper Jr., Phys. Status Solidi (a) 162, 305 (1997).

    Article  Google Scholar 

  15. 15.

    D.M. Fleetwood and R.D. Schrimpf, Defects in Microelectronic Materials and Devices, chap. 20 (Milton Park: CRC Press, 2008).

    Google Scholar 

  16. 16.

    T. Kobayashi, S. Nakazawa, T. Okuda, J. Suda, and T. Kimoto, Appl. Phys. Lett. 108, 152108 (2016).

    Article  Google Scholar 

  17. 17.

    R. Schorner, P. Friedrichs, and D. Peters, IEEE Electron Device Lett. 46, 533–541 (1999).

    Article  Google Scholar 

  18. 18.

    D.K. Schroder, Semiconductor Material and Device Characterization, 3rd ed. (Hoboken: Wiley, 2006).

    Google Scholar 

Download references

Author information



Corresponding author

Correspondence to C. Jiao.

Rights and permissions

Reprints and Permissions

About this article

Verify currency and authenticity via CrossMark

Cite this article

Jiao, C., Ahyi, A.C., Dhar, S. et al. Interface Trap Profiles in 4H- and 6H-SiC MOS Capacitors with Nitrogen- and Phosphorus-Doped Gate Oxides. Journal of Elec Materi 46, 2296–2300 (2017).

Download citation


  • 4H-SiC
  • 6H-SiC
  • fast traps
  • PSG
  • NO annealing