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Comparison of Continuously- and Step-Graded ZnS y Se1−y /GaAs (001) Metamorphic Buffer Layers

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Abstract

The design of metamorphic buffer layers for semiconductor devices with reduced defect densities requires control of lattice relaxation and dislocation dynamics. Graded layers are beneficial for the design of these buffers because they reduce the threading dislocation density by (1) allowing the distribution of the misfit dislocations throughout the buffer layer therefore reducing pinning interactions, and (2) enhancing mobility from the high built-in surface strain which helps to sweep out threading arms. In this work, we considered heterostructures involving a linearly-graded (type A) or step-graded (type B) buffer grown on a GaAs (001) substrate. For each structure type, we studied the equilibrium configuration and the kinetically-limited lattice relaxation and non-equilibrium threading dislocations by utilizing a dislocation dynamics model. In this work, we have also considered heterostructures involving a constant composition ZnS y Se1−y device layer grown on top of a GaAs (001) substrate with an intermediate buffer layer of linearly-graded (type C) or step-graded (type D) ZnS y Se1−y . For each structure type, we studied the requirements on the thickness and compositional profile in the buffer layer for the elimination of all mobile threading dislocations from the device layer by the dislocation compensation mechanism.

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  1. Electrical and Computer Engineering Department, University of Connecticut, Storrs, CT, 06269-4157, USA

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Kujofsa, T., Ayers, J. Comparison of Continuously- and Step-Graded ZnS y Se1−y /GaAs (001) Metamorphic Buffer Layers. J. Electron. Mater. 43, 3047–3055 (2014). https://doi.org/10.1007/s11664-014-3205-3

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