Abstract
The combination of capacitance- and current-voltage (CV/IV) measurements is used to analyze trap generation in silicon-nanocrystal memory devices during Fowler-Nordheim (FN) programming/erasing cycling. CV and IV curves are measured after certain P/E cycles. The flatband voltage (V fb) and the threshold voltage (V th) are extracted from CV curves by solving one-dimensional Schrödinger and Poisson equations. Both hole and electron trappings are observed in the tunneling SiO2. They show up in the accumulation and the inversion, respectively. By fitting FN tunneling current, the area densities of cycling-induced electron traps in the blocking oxide and in the tunneling oxide are finally determined.
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Yang, X., Zhang, M., Wang, Y. et al. Analyzing trap generation in silicon-nanocrystal memory devices using capacitance and current measurement. Sci. China Technol. Sci. 55, 588–593 (2012). https://doi.org/10.1007/s11431-011-4694-4
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DOI: https://doi.org/10.1007/s11431-011-4694-4