1 Introduction

To ensure the linearity and reliability of electronic devices operating at high power and frequency, effective cooling is required [1,2,3]. In transistors, insufficient heat dissipation in the active channel leads to significant temperature elevations, commonly referred to as self-heating, which adversely impacts the device’s performance [4, 5]. Intensive efforts have been undertaken to effectively understand and mitigate the challenge of self-heating, particularly at cryogenic temperature [6,7,8,9]. For example, the simulations reported in [10] show that heat dissipation from the active channel of a transistor is limited by the lack of states in phonon black-body radiation. Consequently, even when devices are cooled below 1 K, the temperature within the active region remains 10–20 K. For transistors, this phenomenon causes the noise figure to plateau below 20 K [11].

Further, to avoid damage and contamination, transistors are commonly coated with a nitride or oxide passivation layer. It is reported in [12] that at room temperature, the self-heating in the active channel of the power transistor is affected by the passivation layer’s thickness and the thermal conductivity of materials utilized in the device. However, the effect of surface passivation on thermal dispersion has not been measured at cryogenic temperatures. In this paper, we present the preliminary results showing the impact of passivation layer thickness on the Kapitza resistance between a gold-plated quartz substrate and liquid nitrogen. In Sect. 2, we will discuss Kapitza resistance and how it can impede phonon transmission at material interfaces. In Sects. 3 and 4, capacitor fabrication and thermometer calibration are presented, and related plots are discussed. Finally, our experimental setup and how we use a capacitance thermometer to measure the Kapitza resistance are presented in Sect. 5.

2 Kapitza Resistance

When heat flows from a solid device to a liquid cryogen, there will be a temperature difference across the interface. This temperature difference is due to the acoustic impedance mismatch between the materials, which impedes the flow of the phonons across the interface, resulting in a measurable resistance known as Kapitza resistance [13,14,15]. The Kapitza resistance, \(R_K\), for constant thermal flux at the interface is given by:

$$\begin{aligned} R_{K} = A \cdot \frac{{\Delta {T}}}{{\dot{Q}}} (\textrm{m}^2\mathrm {K/W}) \end{aligned}$$
(1)

where \(\Delta {T}\) is the temperature difference across the liquid–solid interface, A is the area of the interface, and \(\dot{Q}\) is the total heat flow.

In the case of transistors, when they are cooled with liquid cryogens, we hypothesize that the Kapitza resistance hinders the phonon heat dissipation from the active region, resulting in it being hotter than its surroundings [10].

3 The Fabrication

To investigate the effect of the surface passivation layer on the Kapitza resistance at the interface of the sample and liquid nitrogen, we have fabricated parallel plate quartz capacitors that act as thermometers [16]. Quartz inherits a lower dielectric loss tangent and dielectric constant than silicon [17]. It also has a very low thermal expansion coefficient, which means its physical dimensions change very little with temperature [18]. Thus, quartz can be a decent choice for applications that require stability under varying temperature conditions. Also, since its dielectric constant is temperature-dependent in the region of interest (60–100 K), it is chosen as the dielectric of the capacitor in this experiment. To fabricate the capacitors, the quartz wafer is diced into \(20\times 20\) mm\(^2\) chips with the substrate thickness of 500 ± 20 \(\mu \)m with thickness tolerance and cutting deviation of ±20 \(\mu \)m and ±0.1 mm, respectively. The samples are then patterned with a laser writer and coated with (50 ± 2) nm layers of Au on both sides, using an electron beam evaporator. Further, to vary the heat flux across the interface of Au-SiN, one side of the capacitor acts as a heater, using a meandering path that is patterned with Photo-lithography and a Lift-off process [16]. Also, a thin border electrode (guard electrode) is used to prevent the chip from stray and fringe capacitances. In the second phase of fabrication, different passivation layers of \(\text {SiN}\), ranging 0 \(\sim \) 240 nm, are deposited over both sides of the capacitor by plasma-enhanced chemical vapor deposition (PECVD). Figure 1 illustrates the fabricated samples.

Fig. 1
figure 1

The capacitor model, consisting of a quartz dielectric, gold plates, an embedded heater, and different thicknesses of SiN (top and bottom sides). Fabricated samples: Unpassivated and 60 nm of SiN. The 3 small rectangles in the 60 nm samples are unpassivated to allow the capacitance measurement and bias wires to be attached

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To use the fabricated capacitor as a reliable thermometer, it needs to be calibrated. Therefore, the variation of the dielectric constant of quartz should be measured with respect to temperature to provide a calibration plot.

4 Calibration

A cryostat equipped with a two-stage mechanical cooler (dry cooling) is used to calibrate the dielectric constant of the samples against temperatures from 60 to 100 K. A copper sample holder is used to provide a thermal contact for the sample in the cooling process, Fig. 2. It contains two external heaters and a calibrated temperature sensor (Lakeshore Cernox: CX-1030-CU-HT-0.3L) placed on the copper sample holder. To measure the capacitance, two pairs of 0.1 mm-thick shielded copper wires are indium soldered at the allocated bond pads on the top and bottom of the samples. The copper wires are then soldered to the SMA connectors, which are connected to a Keysight LCR meter Model: E4980AL using stainless steel coaxial cables. It is then attached to the 4 K stage of a cryostat to conduct the calibration process. Having the area of the sample (\(A = 20 \times 20 \, \text {mm}^2\)), the thickness of the capacitance (\(d=500 \, \mu \text {m}\)), and the acquired capacitance data (C) by the LCR meter, the dielectric constant (\(\varepsilon _r\)) of the capacitance can be achieved by \(\varepsilon _r = \frac{C \cdot d}{A\cdot \varepsilon _0}\) where \(\varepsilon _0\) is approximately \(8.854 \times 10^{-12}\) (F/m).

Fig. 2
figure 2

The copper sample holder, with the central sample epoxied in place and connected to the outer SMA connectors with copper wires ( Two SMAs are connected to the \(H_p\) - \(H_c\) part of the LCR meter, and the other two are connected to \(L_p\) - \(L_c\)). The heaters allow the temperature of the sample to be varied, with the calibrated thermometer (Cernox) providing an accurate temperature value

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The calibration plots for cooling are shown in Fig. 3.

Fig. 3
figure 3

Calibration plot: a The calibration plot in dry cooling (cryostat). The red marker shows the measured dielectric constant at 77 K (the reference point in dry cooling), while the green marker illustrates the measured dielectric constant in liquid nitrogen (77 K). b Adjusted calibration plot from 60 K to 100 K due to the change in measuring environment (liquid nitrogen reference point)

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Since the experiment is based on the immersion of samples in liquid nitrogen, the acquired calibration data require a correction to compensate for the slightly different electromagnetic environment seen by the capacitor when immersed in the liquid nitrogen dewar. Further, the plot employs a linear regression fit for the dielectric constant trend in terms of temperature, and the uncertainty of the acquired data for the dielectric constant represents the standard errors in data acquisition by the LCR meter.

Fig. 3a shows that the dielectric constant in liquid nitrogen (wet cooling) is higher than that measured in the cryostat (dry cooling). Therefore, we apply a linear shift to the calibration to correct for the change in the environment, which can be seen in Fig. 3b. In order to validate this phenomenon, we conducted an experiment involving the immersion of five separate samples (ranging from 0 to 240 nm) in liquid nitrogen and measured the capacitance using LCR and averaged. The effect was repeatable with the measured dielectric constant at 4.61741 ± 7.78E-05 at 77 K and assumed to be linear across the temperature region of interest.

5 Kapitza Resistance Measurement

To derive the Kapitza resistance using Eq. 1, it is required to measure the surface temperature while applying constant power for different thicknesses of passivation.

Fig. 4
figure 4

a PTFE-based sample holder. b Measurement setup, comprising the measurement schematic of 4-wire measurement of capacitance and DC biasing of the heater

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To minimize noise and the impact of the test fixture, a 4-wire capacitance measurement, as explained in Sect. 4, is performed. Also, to provide the DC bias, two bond pads are allocated at each end of the meander and connected to a Keithley source meter, model: 2401, via coaxial cables. In this way, the applied DC current makes the meander a controllable heater (\(\sim \) 14 \(\Omega \)). The wired sample is then placed on a polytetrafluoroethylene (PTFE) sample holder (thickness: 1.5 mm), using plastic washers Fig. 4a. A low pass filter with a cutoff frequency of 100 kHz is also used to reduce unwanted noise interference (mostly from the source meter at 80 kHz). The setup can be seen in 4b.

To measure the Kapitza resistance, each sample undergoes immersion in the liquid nitrogen bath for 20 min to ensure it is properly thermalized. The volume of the liquid nitrogen is chosen in a way that applying heat to the sample does not warm the reservoir significantly. Also, the generated heat by the LCR meter into the sample is in the order of nW, which is negligible.

For each sample, 200 readings of the capacitance at a frequency of 200 kHz are acquired and averaged. This is repeated at six different power levels, ranging from 2.04 to 8.28 mW, corresponding to a current sweep from 10 to 20 mA in steps of 2 mA. The dielectric constant is then calculated, and the corresponding temperature value is found from the fit in Fig. 3b. The Kapitza resistance is then calculated using Eq. 1 and shown in Fig. 5.

Fig. 5
figure 5

Kapitza resistance values for different passivation layers and applied power. Considering a constant power for each sample, by increasing the thickness of the passivation layer, the Kapitza resistance increases. The uncertainty of the plot includes the uncertainty of \(R_K\) in the Eq. 1. It consists of uncertainties in calculating \(T_2\) using Fig. 3 and the related uncertainty in heat flux (\(\dot{Q}\))

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The data in Fig. 5 show that for a constant power, as the passivation thickness increases, there is a corresponding rise in the Kapitza resistance. Therefore, this supports our assumption that the passivation layer has a direct impact on the self-heating of the active regions in cryogenic electronics.

6 Conclusion

Self-heating behavior of the active channel of transistors puts constraints on the performance of these devices. Since the surface of transistors is commonly coated with a passivation layer, thermal dissipation can be restricted by this layer. In this paper, we investigated an experimental setup to evaluate the effect of surface passivation on Kapitza resistance at the interface of a solid and liquid nitrogen. We found that the Kapitza resistance increased for thicker passivation layers, increasing the self-heating effect. The results suggest that since Kapitza resistance increases with the variation of the passivation layer thickness, reducing the passivation layer thickness to a desirable thickness may improve the self-heating in transistors, and further work is underway to investigate this.