1 Introduction

Metal–interlayer–semiconductor (MIS)-type Schottky contacts (SCs) are important electronic device for electronic industry as they are used in many applications, such as power electronics [1], solar cells [2], photodiodes [3], capacitors, and transistors [4]. They have more beneficial properties over P/N contacts like low signal-to-noise ratio, high power capacity, high rectification ratio (RR), and high-speed switching elements [5]. However, performance of these contacts are limited by work function and interface properties of metal and semiconductor. Studies on these structures have gained momentum with the observation of natural or artificially formed interlayer at metal/semiconductor interface that leads to an important change in the electric/dielectric properties of metal/interlayer/semiconductor (MIS)-type SCs [6, 7]. In many studies, to change and control the barrier height (BH), the performance of metal–semiconductor (MS) structure is improved usually using an organic or insulator interlayer. In other words, especially high dielectric organic compounds [7], polymers [8], nitride layers [9], metal oxides [10], and diamond-like carbon films [11, 12] have been used as an interlayer to increase the MIS-type SDs and capacitors.

Among these type of materials, diamond-like carbon (DLC) films are an important class of coating materials which have superior properties depending on the proportion of sp2 and sp3 bonds. The deposition method and doping are also the most important parameters that determine the bond structure [13,14,15,16]. These films are mostly deposited by chemical vapor deposition (CVD) and physical vapor deposition (PVD) methods for a wide variety of applications, as high-quality films can be obtained by these methods [13, 17, 18]. Another deposition method is the electrochemical deposition method which is very easy when compared to the others [11]. Relatively lower-quality films are obtained by the electrodeposition for mechanic and tri-biological applications. However, recently, our group have used the electrodeposited DLC films to fabricate MIS-type SDs. Well and encouraging results have been obtained by DC characterization of these devices [11, 12, 19]. So, AC characterization, frequency, and voltage dependence of the fabricated device are also important and require investigation to determine the applicability of the obtained devices. Dielectric materials are widely used in MIS/MOS capacitors and MISFET/MOSFET field-effect transistors because of their charge storage capabilities. Also, they are often used to improve the performance of semiconductor devices. Dielectrics can be easily polarized by an external electric field [20, 21]. Thus, dielectric acquires a net dipole moment. This is known as polarizability.

Today, the basic scientific/technical problems of the MS and MIS-type SCs is relevant to improve the performance of these structures and reduce the cost using new interfacial layer. Dielectric properties and conductivity in MIS-type structures depend on many factors, such as cleaning surface of semiconductor, interfacial layer thickness and its dielectric value, applied voltage, frequency, temperature, series resistance (Rs), surface states (Nss) and their lifetimes (τ). In addition, for the analysis of their electric and dielectric measurements at only one frequency, temperature, voltage, or a narrow, these regimes cannot give more accuracy and reliable information to us on the basic electric/dielectric properties and conduction mechanisms.

Therefore, in the present work, sulfur-doped DLC (S-DLC) interfacial layer was grown onto p-Si wafer by electrodeposition technique using methanol as carbon source and thiophene as sulfur source. The morphology and chemical composition of the film have been analyzed using scanning electron microscopy (SEM) and X-Ray photoelectron spectroscopy (XPS), respectively. The obtained film on p-Si wafer has been used to perform an Au/(S-DLC)/p-Si device. In addition, dielectric permittivity, ac conductivity, and electric modulus were evaluated using the measured admittance data at two frequencies and over a wide temperature range.

2 Experimental detail

The nanocomposite film was deposited onto p-Si wafer by utilizing two-electrode electrodeposition setup. The electrolyte was prepared by mixing 100-ml methanol and 100-µl thiofuran. Graphite plate and p-Si substrate were used as anode and cathode, respectively. The distance between the electrodes, the applied potential, and duration time were 4 mm, 500 V and 2 h, respectively. More details on the deposition system were given elsewhere [11, 12]. SEM images of the FEI FEG-Quanta 450 model were caught. A SPECS photoelectron spectrometer with a monochromatic-AlKa X-Ray (XR) was utilized to manage the XR photoelectron spectroscopy investigation. To measure the admittance of the Au/S-DLC/p-Si device, HP-4192A LF impedance analyzer was used. In order to perform the C–V–T and G/ω-V-T measurements, the prepared device was placed into VPF-475 cryostat and then they were carried out between 80 and 440 K at 0.1-MHz and 0.5-MHz frequencies.

3 Results and discussion

3.1 SEM analysis

The SEM spectra of the (S-DLC) interlayer is shown in Fig. 1. Figure 1 shows that the Si wafer is fully covered by a continuous, crack-free, and lumpy film. In this study by changing the deposition parameters crack-free film could be obtained.

Fig. 1
figure 1

SEM image of the prepared S-DLC film by utilizing electrodeposition method

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3.2 XPS analysis

Figures 2a and b show the C 1s and S 2p XPS spectra of the S-DLC nanocomposite film. In Fig. 2a, C 1s spectrum was de-convoluted into three different peaks with different magnitude and binding energy which was attributed to C–S, C–C, and C–OOH, respectively [22]. Figure 2b shows that the S 2p spectrum appeared around 167.8 eV binding energy that was assigned to sulfide compounds (like C–S–C and H2S) [12]. As can be clearly seen from the XPS spectra, the S has been thoroughly doped into the DLC film.

Fig. 2
figure 2

XPS spectra of the prepared S-doped DLC nanocomposite

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3.3 Admittance measurements

Admittance measurements of the fabricated Au/(S-doped DLC)/p-Si (MIS) are based on the voltage-dependent capacitance/conductance–voltage–temperature (C–V–T, G/ω–V–T) measurements of device for 01 and 0.5 MHz in a wide range of temperature (80–440 K) to obtain a detail information on the basic electric, dielectric, and conduction mechanism. Therefore, both the C–V and G/ω–V measurements type device/structure were carried out at between − 4 V and + 8 V as shown in Fig. 3a and b and Fig. 4a and b, respectively. As seen in these figures, as the temperature increases, the C value for all the frequencies increases. When the temperature changes, it causes changes in dielectric properties. Since capacitance is directly proportional to dielectric constant, the capacitance changes with temperature. The observed increase both in the C and G/ω with increasing temperature is the result of the excitation of many electronic charges from valence band or traps to the conductance band under temperature and external electric field effects [23,24,25,26]. It is well known that at absolute temperature and very low temperatures, almost all electrons are considered frozen and so they have not enough thermal energy to move from the valence band to conductance band or over the barrier height. However, very little conduction can only be achieved through traps located between the metal and the semiconductor and in the forbidden energy gap. When the temperature increases, many electrons gain sufficient thermal energy to over to barrier height. As a result, the conduction will increase with the temperature and bias voltage.

Fig. 3
figure 3

C–V–T curves of the Au/(S-DLC)/p-Si device a 100 kHz and b 500 kHz

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Fig. 4
figure 4

G/ω–V–T curves of the Au/(S-DLC)/p-Si device a 0.1 MHz and b 0.5 MHz

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As shown in Fig. 3a and b and Fig. 4a and b, both the value of the C and G/ω decreased as the frequency increased. This frequency dependence of C and G results from the frequency response of the interface states or traps (Nss) depend on their lifetimes or relaxation times (τ) [20, 25,26,27,28]. At low frequencies, the period (T = 1/2πf) is higher than the τ of the Nss. In this situation, they can easy follow the ac signal. Therefore, the C value is high at low frequencies. At higher frequencies, the opposite of this situation occurs. On the other hand, while Nss may be dominated in inversion/depletion regimes at moderate frequencies, Rs of the device is particularly dominant only at the accumulation regime (G = 1/Rs) at enough high frequencies. Thus, the real value of Rs can be calculated from the strong accumulation zone using Nicollian–Brews method (Rs = G/(G2 + (ωC)2)) [20]. Figure 4a and b shows the (G/ω − V) curves as a function of voltage at different temperatures and for frequencies of 0.1 MHz and 0.5 MHz, respectively. As seen in these figures, the conductance increases with an increase in temperature due to the thermally activated conduction process. Because, more and more thermally generated electronic charges increase with increasing temperature. In addition, conductance with frequency exhibits similar behavior with capacitance.

Additionally, the temperature sensitivity (S = dV/dT) of the structure was analyzed using voltage–temperature (V–T)-dependent capacitance values. Figure 5a and b shows the variation of voltage with temperature (between 290 and 440 K) at different constant capacitance values for 100 kHz and 500 kHz, respectively. From Fig. 5a, the S values were found to be about -26 mV/K and – 28 mV/K for 6 nF and 7 nF, respectively. From Fig. 5b, the S values were found to be about – 21 mV/K and – 24 mV/K for 3 nF and 4 nF, respectively. The sensitivity value increases with increase in constant capacitance value. The obtained result is in agreement with similar studies in the literature [29,30,31]. It is clear that the structure demonstrates very high temperature sensitivity.

Fig. 5
figure 5

a Applied voltage vs. temperature plots at different capacitance values for a 100 kHz and b 500 kHz

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3.4 Dielectric properties

Using the dielectric spectroscopy method, the basic dielectric parameters and conductivity properties of a dielectric material can be measured depending on frequency, temperature, and applied bias voltage or electric field. The dielectric processes are usually depending on interlayer, its thickness and homogeneity, Nss and their τ, frequency, temperature, and applied external electric field [32]. The interlayer material can be easily polarized because of the electrons at surface states and dipoles may be easily restructured by reordering under electric field and temperature, especially at lower frequencies, but at higher frequencies, the dielectric value decreases due to shorter time available for the dipoles to align [33]. The observed decrease in ε′ and ε" at high frequency is the result of a decrease in the polarization and also Nss [6, 20]. In other words, the contribution of polarization and Nss at lower frequency is quite higher than high frequencies [34,35,36].

A dielectric material has very low conductivity at dc voltage. The complex dielectric (ε*) including the real (ε′) and imaginary (ε") parts is given as follows [37, 38]:

$$\varepsilon^{*} = \varepsilon^{\prime} - j\varepsilon^{\prime\prime} = \frac{{C_{{\text{m}}} }}{{C_{0} }} - j\frac{{G_{{\text{m}}} }}{{\omega C_{0} }},$$
(1)

where Co is the capacitance of the empty capacitor and is given as follows [38]:

$$C_{0} = \frac{{\varepsilon_{o} A}}{d}.$$

In Eqs. 1 and 2, the Cm and Gm are the measured C and G values, A is the Schottky contact area, and d is the interlayer thickness. While ε′ is the measure of the energy stored in the polarized dielectric material, ε" is the loss energy. The magnitude of ε′ and ε" is determined from Eq. 2. In addition, the dielectric loss tangent (tanδ) which is called as dissipation factor is defined as follows:

$$\tan \left( \delta \right) = \frac{{\varepsilon^{\prime\prime}}}{{\varepsilon^{\prime}}} = \frac{1}{\omega RC}.$$
(3)

The temperature-dependent changes in ε′, ε″, and tanδ values are given in Fig. 6a–c, respectively. As shown in these figures, while their values increase with increasing temperature, they decrease with increasing frequency. Since the temperature becomes increased, dipole orientations become easy and hence orientation polarization increases. This behavior causes an increase in dielectric constant [25, 39,40,41,42,43,44,45]. Besides, the observed increase in ε′ value results from the contribution of the electronic charges to the polarization. In addition, the dielectric loss increases as the mobility of electronic charges increases with increase in temperature. As the frequency increases, ε′ and ε″ value decrease due to polarization effects [46,47,48,49]. Especially, at low frequencies, space charge polarization or interfacial polarization is effective and hence, the magnitude of ε′ becomes high at low frequency.

Fig. 6
figure 6

a ε′ − T, b ε″ − T, and (c) tan δ − T plots of the Au/(S-DLC)/p-Si device at 100 and 500 kHz, respectively

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3.5 Electric modulus

Complex electric modulus (M* = M′ + jM″) is given as follows [41, 50,51,52,53]:

$$M^{*} = \frac{1}{{\varepsilon^{*} }} = \frac{{\varepsilon^{\prime}}}{{\varepsilon^{{\prime}{2}} + \varepsilon^{{\prime\prime}{2}} }} + j\frac{{\varepsilon^{\prime\prime}}}{{\varepsilon^{{\prime}{2}} + \varepsilon^{{\prime\prime}{2}} }}.$$
(4)

Figure 7a and b indicates a plot of M′ and M″ as a function of temperature for two frequencies. As seen in these figures, while M′ value decreases with increasing temperature, M″ value increases. Both M′ and M″ values have an almost constant value below room temperature.

Fig. 7
figure 7

a M′ − T and b M″ − T plots of the Au/(S:DLC)/p-Si device at 100 and 500 kHz, respectively

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3.6 Electrical ac Conductivity

The AC electrical conductivity (σac) is given as follows:

$$\sigma_{{{\text{ac}}}} = \varepsilon_{0} \omega \varepsilon^{\prime\prime} = \omega \varepsilon_{0} \varepsilon^{\prime}\tan \delta.$$
(5)

Figure 8 indicates the ac conductivity with temperature for two frequencies. As seen in this figure, the ac conductivity has an almost constant value below room temperature. Above room temperature, the ac conductivity increases rapidly by increasing temperature. Moreover, the value of σac increases with the increasing frequency. The increase of σac with temperature is due to the increase in thermally generated carriers [41, 53,54,55,56]. In other words, the increase of σac results from the increasing drift mobility of electronic charges through hopping conduction.

Fig. 8
figure 8

Temperature-dependent σac in the Au/(S:DLC)/p-Si device at 0.1 and 0.5 MHz

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As shown in Fig. 8, the value σac increases with temperature and it was considerably high at enough high temperatures, but at low temperatures, it remains almost independent of temperature for both frequencies. Such behavior of it at high temperature is typical of semiconductor behavior. The conductivity is treated as temperature-activated hopping from center to center. There are many reports on the ac conductivity in the literature, to evaluate of activation energy (Ea) from the Arrhenius plot [41,42,43]:

In addition, the value of activation energy (Ea) of conductivity was estimated using the Arrhenius equation. Arrhenius equation is defined as follows [43, 57,58,59,60,61]:

$$\sigma_{{{\text{ac}}\left( T \right)}} = \sigma_{0} \exp \left[ {\frac{{ - qE_{{\text{a}}} }}{{k_{{\text{B}}} T}}} \right],$$
(6)

where σo is an exponential factor and kB is the Boltzmann’s constant. As shown in Fig. 9, the σac vs T−1 plot has good straight line and the slope of this plot gives to us a direct Ea. It is clearly that the σac vs T−1 plot has two distinctive linear part which are called as Region-1 (80–230 K, and Region-2 (260–440 K), respectively. Such behavior of it can be explained in terms of the hopping of electrons between interface traps. The calculated Ea and σ0 values are given in Table 1. Both Ea and σ0 values increase with increase in temperature. Also, while these values decrease with increasing frequency at lower temperatures and then increase at high temperatures.

Fig. 9
figure 9

Arrhenius plots of the Au/(S:DLC)/p-Si device at 100 and 500 kHz

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Table 1 The calculated Ea and σ0 values
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All these results are indicated that the C, G/ω, and σac values are very sensitive to temperature especially at and above room temperatures due to activated many electrons under temperature effect. This change in their values from voltage region to other or traps to traps is the result of thermal re-order/structure of the electronic charges under temperature and electric field effects.

4 Conclusion

In this study, (S:DLC) interfacial layer was sandwiched between metal (Au) and semiconductor (p-Si) using electrodeposition method using methanol as carbon source and thiophene as sulfur source. Firstly, the morphology and chemical composition of the film were analyzed by SEM and XPS spectroscopy method. Secondly, the “Admittance or conduction technique” which is including a set of frequency or temperature-dependent C and G/ω measurements of performed Au/S-DLC/p-Si device both at 100 kHz and 500 kHz in the frequency range of 80–440 K and voltage range of (− 4 V)−8 V. After that the real (ε′) and imaginary (ε") components of the complex dielectric (ε*) and (M′) and (M″) of the complex electric modulus (M*), tanδ, and ac conductivity (σac) values were calculated from these C and G data. The values of ε′, ε", and σac were usually increased with increasing temperature, but this change becomes more prominent especially at above room temperature. As the dielectric parameters decrease with increasing frequency, the ac conductivity increases. The Ea value of the Au/S-DLC/p-Si device was obtained from the slope of the straight line of the Arrhenius plot (ln(σac − 1000/T) for 100 kHz and 500 kHz. The observed two linear parts of Arrhenius plot show that there is two different conduction mechanisms at low and high temperatures, respectively. The observed higher values of Ea and ε′ (~ 14) even at 100 kHz indicated that hopping of electrons between traps is effective charge transport mechanism and so the prepared Au/(S:DLC)/p-Si/Au structure can be used to store more energy and temperature sensor.