Abstract
This article reports and models the impact of fixed oxide charges distributed spatially in the gate oxide of a metal–oxide–semiconductor (MOS) structure on its flatband voltage. In general analyses, the location of fixed oxide charges is effectively considered at the oxide–semiconductor interface which results in a simpler expression of the flatband voltage. However, for applications where fixed oxide charge distribution is a deciding component, the effect of the measured fixed oxide charge distribution inside the gate oxide needs to be reflected in the expression. The one-dimensional model in this article is used to design and deploy a graphical user interface which enables one to compute the flatband voltage of a MOS structure for any distribution of fixed oxide charges in the gate oxide, inclusive of known functions (Gaussian, exponential, or others), and discrete coordinate-based distributions.
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The datasets generated during and/or analyzed during the current study are available from the corresponding author on reasonable request.
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The authors acknowledge partial support by DST-FIST II, vide sanction no. SR/FST/ET-II/2018/241 for understanding TCAD simulations for MOS capacitors.
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All authors contributed to the study. PH, MR, and AH contributed equally to the work, and contributed to the first draft. PH and MR verified the mathematical considerations of integration, while AH designed the graphical user interface and application. DD, RG, and AH worked on the validation of the numerical simulations and experimental trends. PSD and HC contributed to the design of the methodology. RG supervised the entire work.
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Appendix
Appendix
The graphical user interface can be downloaded as an application at: https://github.com/RupamG21/TSDL_FlatB.
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Hazarika, P., Ray, M., Hazarika, A. et al. Flatband voltage in MOS structures for spatial fixed oxide charge distributions. J Mater Sci: Mater Electron 34, 1242 (2023). https://doi.org/10.1007/s10854-023-10626-0
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DOI: https://doi.org/10.1007/s10854-023-10626-0