Abstract
An integrated voltage divider, providing a transverse electric field, plays an important role in silicon drift detector (SDD). In this paper, an curve-style voltage divider is proposed and two dimensional numerical simulation is done to investigate the optimized width and length of the voltage divider. Low-energy ion implantation is applied to prepare the silicon based voltage divider for SDD. The influence of the implantation conditions and annealing conditions on the sheet resistance of the implanted silicon is also systematically analyzed. The results show that the sheet resistance of the voltage divider with an implantation dose of 5e13 cm−2 and an implantation energy of 30 keV is the most stable in different position with a 6.9% tolerance over the wafer. While for the voltage dividers with an implantation dose of 1e13 cm−2 and an implantation energy of 30 and 100 keV, the tolerance is 13.1% and 12.1%, respectively. Finally, a uniform drop in voltage between the drift rings is achieved, creating a uniform drift electric field within the detector.
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Acknowledgements
The authors would like to thank High Frequency and High Voltage Center of Institute of Microelectronics, Chinese Academy of Sciences and all staff of solar cells group for their support. This work were supported by NSFC (Grant Nos. 51702355, 61674167), the national key research program (Grant Nos. 2018YFB1500500, 2018YFB1500200) and JKW Project 31512060106.
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Liu, S., Xue, Y., Jia, R. et al. Design and preparation of integrated voltage divider for silicon drift detector by ion implantation. J Mater Sci: Mater Electron 30, 10152–10161 (2019). https://doi.org/10.1007/s10854-019-01351-8
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DOI: https://doi.org/10.1007/s10854-019-01351-8