Skip to main content
SpringerLink
Log in

A Systematic Bit Selection Method for Robust SRAM PUFs

  • Published:
Journal of Electronic Testing Aims and scope Submit manuscript

Abstract

A physical unclonable function (PUF) is a digital circuit that can generate a die specific unique and stable response, which can be used for authentication and key generation. Since no major design or manufacturing modifications are required, exploitation of SRAMs to implement PUFs is a promising option. When initially powered up, in dividual SRAM cells acquire unique logic states based on the inherent bias of the cell. At advanced technology nodes, this bias is primarily due to unavoidable random manufacturing process variations, which are unpredictable and vary randomly from cell to cell, as well as chip to chip. When an SRAM is read out, these power-up states provide a unique output that is largely consistent during repeated power-up cycles for a given SRAM, but varies for different copies of the same part, as required of a PUF. However, this powerup state of SRAMs cannot be directly used (e.g. in cartographic key generation), due to unpredictability in some of the SRAM cells caused by electrical and electromagnetic noise and temperature fluctuations. We show in this paper that power-up states are also influenced by the power supply ramp rate at power-up, which can be yet another source of cell instability. To address the general problem of instability in SRAM power-up states that can result in inconsistent responses from SRAM PUFs, we present an effective stable cell selection method to identify the cells in the SRAM that are strongly biased, thereby resistant to circuit noise, voltage and temperature changes, and also aging. The data from the Silicon experiments presented here shows that the selected stable SRAM cells are highly reliable over temperature and voltage variations, with a bit error rate (BER) close to zero.

This is a preview of subscription content, log in via an institution to check access.

Access this article

Log in via an institution

Price excludes VAT (USA)
Tax calculation will be finalised during checkout.

Instant access to the full article PDF.

Institutional subscriptions

Fig. 1
Fig. 2
Fig. 3
Fig. 4
Fig. 5
Fig. 6
Fig. 7
Fig. 8
Fig. 9

Similar content being viewed by others

Data Availability

The authors declare that the data supporting the fndings of this study are available within the article.

References

  1. Baturone I, Prada-Delgado MA, Eiroa S (2015) Improved generation of identifiers, secret keys, and random numbers from SRAMs. IEEE Trans Inf Forensics Secur 10(12):2653–2668

    Article  Google Scholar 

  2. Bhargava M, Cakir C, Mai K (2012) Reliability enhancement of bi-stable PUFs in 65nm bulk CMOS. Proc. IEEE International Symposium on Hardware-Oriented Security and Trust. IEEE, pp 25–30

  3. Bhargava M, Mai K (2014) An efficient reliable PUF-based cryptographic key generator in 65nm CMOS. Proc. Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, pp 1–6

  4. Böhm C, Hofer M (2012) Physical unclonable functions in theory and practice. Springer Science & Business Media, US

    Google Scholar 

  5. Dodis Y, Reyzin L, Smith A (2004) Fuzzy extractors: How to generate strong keys from biometrics and other noisy data. Proc. International conference on the theory and applications of cryptographic techniques. Springer, pp 523–540

    MATH  Google Scholar 

  6. Elshafiey AT, Zarkesh-Ha P, Trujillo J (2017) The effect of power supply ramp time on SRAM PUFs. Proc. IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS). IEEE, pp 946–949

  7. Guajardo J, Kumar SS, Schrijen G-J, Tuyls P (2007) FPGA intrinsic PUFs and their use for IP protection. Proc. International Workshop on Cryptographic Hardware and Embedded Systems. Springer, pp 63–80

    Google Scholar 

  8. Guajardo J, Kumar SS, Schrijen G-J, Tuyls P (2007) Physical unclonable functions and public-key crypto for FPGA IP protection. Proc. International Conference on Field Programmable Logic and Applications. IEEE, pp 189–195

  9. Guin U, Wang W, Harper C, Singh AD (2019) Detecting recycled SOCs by exploiting aging induced biases in memory cells. Proc. IEEE International Symposium on Hardware Oriented Security and Trust (HOST). IEEE, pp 72–80

  10. Herder C, Yu M-D, Koushanfar F, Devadas S (2014) Physical unclonable functions and applications: A tutorial. Proc IEEE 102(8):1126–1141

    Article  Google Scholar 

  11. Holcomb DE, Burleson WP, Fu K (2008) Power-up SRAM state as an identifying fingerprint and source of true random numbers. IEEE Trans Comput 58(9):1198–1210

    Article  MathSciNet  Google Scholar 

  12. Kim J, Lee J, J Abraham A (2010) Toward reliable SRAM-based device identification. Proc. IEEE International Conference on Computer Design. IEEE, pp 313–320

  13. Kusters L, Ignatenko T, Willems FM, Maes R, van der Sluis E, Selimis G (2017) Security of helper data schemes for SRAM-PUF in multiple enrollment scenarios. Proc. IEEE International Symposium on Information Theory (ISIT). IEEE, pp 1803–1807

  14. Leest VVD, Sluis EVD, Schrijen G-J, Tuyls P, Handschuh H (2012) Efficient implementation of true random number generator based on SRAM PUFs. Cryptography and Security: from theory to applications. Springer, pp 300–318

    Chapter  Google Scholar 

  15. Li Y, Hwang C-H, Li T-Y, Han M-H (2009) Process-variation effect, metal-gate work-function fluctuation, and random-dopant fluctuation in emerging cmos technologies. IEEE Trans Electron Device 57(2):437–447

    Article  Google Scholar 

  16. Liu K, Chen X, Pu H, Shinohara H (2020) A 0.5-v hybrid SRAM physically unclonable function using hot carrier injection burn-in for stability reinforcement. IEEE J Solid State Circuits

  17. Liu M, Zhou C, Tang Q, Parhi KK, Kim CH (2017) A data remanence based approach to generate 100% stable keys from an SRAM physical unclonable function. Proc. IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED). IEEE, pp 1–6

  18. Maes R, Rozic V, Verbauwhede I, Koeberl P, Van der Sluis E, van der Leest V (2012) Experimental evaluation of physically unclonable functions in 65 nm CMOS. Proceedings of the ESSCIRC (ESSCIRC). IEEE, pp 486–489

  19. Maes R, Van Der Leest V (2014) Countering the effects of silicon aging on SRAM PUFs. Proc. IEEE International symposium on hardware-oriented security and trust (HOST). IEEE, pp 148–153

  20. Maes R, Van Herrewege A, Verbauwhede I (2012) PUFKY: A fully functional PUF-based cryptographic key generator. Proc. International Workshop on Cryptographic Hardware and Embedded Systems. Springer, pp 302–319

    Google Scholar 

  21. Mathew SK, Satpathy SK, Anders MA, Kaul H, Hsu SK, Agarwal A, Chen GK, Parker RJ, Krishnamurthy RK, De V (2014) 16.2 a 0.19 pj/b pvt-variation-tolerant hybrid physically unclonable function circuit for 100% stable secure key generation in 22nm CMOS. Proc. IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC). IEEE, pp 278–279

  22. Miller A, Shifman Y, Weizman Y, Keren O, Shor J (2019) A highly reliable SRAM PUF with a capacitive preselection mechanism and pre-ECC BER of 7.4 e-10. Proc. IEEE Custom Integrated Circuits Conference (CICC). IEEE, pp 1–4

  23. Rahman MT, Forte D, Rahman F, Tehranipoor M (2015) A pair selection algorithm for robust ro-RO-PUF against environmental variations and aging. Proc. 33rd IEEE International Conference on Computer Design (ICCD). IEEE, pp 415–418

  24. Saraza-Canflanca P, Carrasco-Lopez H, Santana-Andreo A, Brox P, Castro-Lopez R, Roca E, Fernandez FV (2021) Improving the reliability of SRAM-based PUFs under varying operation conditions and aging degradation. Microelectron Reliab 118:114049

    Article  Google Scholar 

  25. Satpathy S, Mathew SK, Suresh V, Anders MA, Kaul H, Agarwal A, Hsu SK, Chen G, Krishnamurthy RK, De VK (2017) A 4-fj/b delay-hardened physically unclonable function circuit with selective bit destabilization in 14-nm trigate CMOS. IEEE J Solid State Circuits 52(4):940–949

    Article  Google Scholar 

  26. Shifman Y, Miller A, Keren O, Weizmann Y, Shor J (2018) A method to improve reliability in a 65-nm SRAM PUF array. IEEE Solid State Circuits Lett 1(6):138–141

    Article  Google Scholar 

  27. Vatajelu EI, Di Natale G, Prinetto P (2016) Towards a highly reliable sram-based PUFs. Proc. Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, pp 273–276

  28. Wang W, Guin U, Singh A (2020) Aging-resilient SRAM-based true random number generator for lightweight devices. J Electron Test 36:301–311

    Article  Google Scholar 

  29. Wang W, Singh A, Guin U, Chatterjee A (2018) Exploiting power supply ramp rate for calibrating cell strength in SRAM PUFs. Proc. IEEE 19th Latin-American Test Symposium (LATS). IEEE, pp 1–6

  30. Xiao K, Rahman MT, Forte D, Huang Y, Su M, Tehranipoor M (2014) Bit selection algorithm suitable for high-volume production of SRAM-PUF. Proc. IEEE international symposium on hardware-oriented security and trust (HOST). IEEE, pp 101–106

  31. Yu M-D, Devadas S (2010) Secure and robust error correction for physical unclonable functions. IEEE Des Test Comput 27(1):48–65

    Article  Google Scholar 

  32. Zhang J-L, Qu G, Lv Y-Q, Zhou Q (2014) A survey on silicon PUFs and recent advances in ring oscillator PUFs. J Comp Sci Technol 29(4):664–678

    Article  Google Scholar 

Download references

Funding

This paper is based in part upon research supported by the National Science Foundation under Grant No. CCF 1910964.

Author information

Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Auburn University, Auburn, AL, 36849, USA

    Wendong Wang, Adit D. Singh & Ujjwal Guin

Authors
  1. Wendong Wang
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Adit D. Singh
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Ujjwal Guin
    View author publications

    You can also search for this author in PubMed Google Scholar

Corresponding author

Correspondence to Wendong Wang.

Ethics declarations

Conflict of Interest/Competing Interest

The authors have no conficts of interest to declare that are relevant to the content of this article.

Additional information

Responsible Editor: M. Taouil

Publisher's Note

Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Rights and permissions

Reprints and permissions

About this article

Check for updates. Verify currency and authenticity via CrossMark

Cite this article

Wang, W., Singh, A.D. & Guin, U. A Systematic Bit Selection Method for Robust SRAM PUFs. J Electron Test 38, 235–246 (2022). https://doi.org/10.1007/s10836-022-06006-x

Download citation

  • Received:

  • Accepted:

  • Published:

  • Issue Date:

  • DOI: https://doi.org/10.1007/s10836-022-06006-x

Keywords

Search

Navigation