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A New Algorithm for the Selection of Control Cells in Boundary-Scan Interconnect Test

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Abstract

This paper presents an algorithm for the generation of the values to be loaded in the control cells of a Boundary-Scan (BS) chain during an interconnect test. The algorithm selects several groups of control cells while avoiding that two or more drivers excite the same net at the same time, allowing every net to be active for every test vector and testing every driver after the execution of the overall test process. It allows for 100% detection of short, open, stuck-at and driver transition faults on fully controllable and observable BS nets on virtually any BS board. In fact, only two minor requirements are imposed: (1) the sets of nets affected by two different control cells must be disjoint or one of them must be included in the other; (2) every net of a set affected by a control cell must have the same number of drivers. In addition, the algorithm can be implemented very easily, avoiding the need to explore all the possible combinations of values to be loaded in the control cells.

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Notes

  1. Devices such as buffers are not considered to be “logic”.

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Authors and Affiliations

  1. Microelectronic Circuits Design Group, University of Cadiz, Escuela Sup. de Ingenieria, C/Chile, 1-11003, Cadiz, Spain

    A. Quiros-Olozabal & M. A. Cifredo-Chacon

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  1. A. Quiros-Olozabal
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  2. M. A. Cifredo-Chacon
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Correspondence to A. Quiros-Olozabal.

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Responsible Editor: E. J. Marinissen

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Quiros-Olozabal, A., Cifredo-Chacon, M.A. A New Algorithm for the Selection of Control Cells in Boundary-Scan Interconnect Test. J Electron Test 25, 187–195 (2009). https://doi.org/10.1007/s10836-008-5091-1

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  • DOI: https://doi.org/10.1007/s10836-008-5091-1

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