Fig. 1
a nMOS and pMOS clocked semi-floating-gate (CSFG) transistors. b The symmetric ultra low voltage inverter. c Recharge mode and d evaluate mode
Fig. 1 | Analog Integrated Circuits and Signal Processing
a nMOS and pMOS clocked semi-floating-gate (CSFG) transistors. b The symmetric ultra low voltage inverter. c Recharge mode and d evaluate mode