Etching through silicon wafer in inductively coupled plasma

Abstract

 Inductively coupled plasma reactor (ICP) has been used to etch holes, trenches and other shapes completely through 380 and 525 μm thick silicon wafers. Bosch/STS process of gas flow pulsing with SF₆ etch step and C₄F₈ sidewall passivation step was employed. Etch rate reduction due to aspect ratio dependence and pattern size and shape effects have been explored. Etch stop has been studied both on bulk and SOI wafers. Notching effect was observed for high aspect ratio features but it was absent in large, low aspect ratio features. Aluminum etch stop layer has been shown to eliminate notching.