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Low voltage charge-plasma based dopingless Tunnel Field Effect Transistor: analysis and optimization

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Abstract

In this reported work, we have analyzed the different figure of merits for dopingless TFET. The charge-plasma based Planar-TFET does have a dual-gate with a half structure made from Silicon–Germanium (Si–Ge) compound. The Si–Ge is used with a composition factor of 0.45. The Si0.55Ge0.45 helped in the current enhancement of the Silicon-based TFET device. Several linearity parameters are calculated for low and high drain bias to acknowledge the device behavior at different biasing conditions. The heteromaterial planar-TFET is optimized according to the physical conditions where the source contact is considered as Schottky contact with barrier lowering. The work function of the source electrode is varied to check the effects of the Schottky barrier on the device characteristics. The optimized dopingless TFET is scaled down to lower dimensions for the possibility of nano-TFET devices without compromising the device performance. The nanoscaled dopingless nanowire TFET performs better as compared to dopingless planar TFET with similar dimensions. The obtained cutoff frequency is greater than 10 GHz and intermodulation distortion is less than − 650 dBm. The optimized structure showed low noise and harmonic distortions to be used for better sensing applications.

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Authors and Affiliations

  1. Dr BR Ambedkar National Institute of Technology, Jalandhar, Punjab, India

    Naveen Kumar & Ashish Raman

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  1. Naveen Kumar
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  2. Ashish Raman
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Correspondence to Naveen Kumar.

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Kumar, N., Raman, A. Low voltage charge-plasma based dopingless Tunnel Field Effect Transistor: analysis and optimization. Microsyst Technol 26, 1343–1350 (2020). https://doi.org/10.1007/s00542-019-04666-y

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