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Investigation of Charge-plasma Based Dopingless Tunnel FET for Analog/RF and Linear Applications

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Abstract

Tunnel FET (TFET) based upon charged-plasma (CP) concept have came out as a potential Metal-Oxide-Semiconductor-Field-Effect-Transistor (MOSFET) replacement as it provides immunization towards short channel effects (SCEs) and random dopant fluctuations (RDFs), along with providing inherent benefits of conventional TFETs such as low off-state current (IOFF) and sub-60 mV/dec subthreshold swing. So, in this manuscript, we investigate a CP-based dopingless TFET (DLTFET) with source and channel made up of Germanium, Si0.6Ge0.4 drain and TiO2 as gate-dielectric using simulations for low power analog/RF and linear applications and abbreviated as HJ HD DLTFET where HJ stands for heterojunction, HD represents high-κ dielectric. In CP-concept, source and drain regions are generated by applying work function for respective electrodes without performing chemical doping. This manuscript investigates, for the first time, a DLTFET which employs a heterojunction of low bandgap material .i.e. Ge as channel and source material and Si0.6Ge0.4 for drain as it is a high bandgap material relative to Ge, along with TiO2 as a high-κ gate dielectric and drain voltage of 0.3 V. The numerical simulations illustrates higher ION, ION/IOFF ratio and improved average sub-threshold swing (SSavg) for HJ HD DLTFET in comparison to conventional DLTFET. Furthermore, we also investigate the analog/RF and linearity parameters of the HJ HD DLTFET to demonstrate its competence in low-power analog, radio frequency (RF), sensors, and linear applications.

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Acknowledgements

This work was supported by the SMDP-C2SD under the reference letter no. 9(1)2014-MDD (NIT Delhi, Delhi, India).

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The authors did not receive any financial support from any agency/organization for the submitted work.

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Authors and Affiliations

  1. National Institute of Technology Delhi, Delhi, India

    Suruchi Sharma, Rikmantra Basu & Baljit Kaur

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  1. Suruchi Sharma
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  2. Rikmantra Basu
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  3. Baljit Kaur
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In this work, Suruchi Sharma, Rikmantra Basu and Baljit Kaur contributed equally to the design, implementation and analysis of the research, and manuscript write-up.

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Correspondence to Suruchi Sharma.

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The code has been implemented on 2-D silvaco ATLAS device simulator.

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Sharma, S., Basu, R. & Kaur, B. Investigation of Charge-plasma Based Dopingless Tunnel FET for Analog/RF and Linear Applications. Silicon 14, 7701–7710 (2022). https://doi.org/10.1007/s12633-021-01514-5

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  • DOI: https://doi.org/10.1007/s12633-021-01514-5

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