Abstract
The reliability of multilevel inverters (MLIs) is of great importance, when they are employed for applications such as aircrafts, electric vehicles, standalone, and grid connected photovoltaic (PV) system. To achieve required output voltage during post-fault scenarios, several fault tolerant topologies of multilevel inverter have been proposed. However, the primary constraints which add on a limitation to their implementation are increased device count and inability to tolerate single and multiple switch faults with the conduction of lesser or equal switches as in pre-fault case. The inability to tolerate various types of faults, such as open circuit or short circuit, cause severe impact on the system and further increase the cost. In this regard, a fault tolerant (FT) multilevel inverter topology which tolerates aforementioned faults is proposed. The proposed topology is able to withstand both single switch and multiple switch faults with equal or lesser blocking voltage. The proposed topology employs only unidirectional switches, thus increasing the reliability and reducing the cost of inverter. The proposed work is validated experimentally.
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Appendix A
Appendix A
1.1 Evaluation of reliability
Reliability estimation of the proposed topology and other works based on Military Hand book MIL-HDBK-217F [29, 30] is presented.
The probability of having no failure for duration t is defined by function Rs(t) as
where λsys is the failure rate of system.
The mean time to failure (MTTF) can be calculated from Rs(t) as
The failure rate of MOSFET (failures per million hours) is given by
where λb is the base failure rate, \(\pi_{{\text{A}}}\) is application factor which depends on the rated output power, \(\pi_{{\text{Q}}}\) is the quality factor and \(\pi_{{\text{E}}}\) is the environmental factor. The temperature factor \(\pi_{{\text{T}}}\) depends on the junction temperature TJ as given by
where TJ is a function of the ambient temperature Ta (25 °C), the junction to thermal ambient resistance θJA, and the total power dissipation (conduction loss and switching loss together) of the switching device PS, given as
Similarly the failure rate of diode (λdiode failures/million hours) is calculated as
where \(\pi_{{\text{S}}}\) is the electrical stress factor given by \(V_{{\text{s}}}^{2.43}\), where Vs is the ratio of applied voltage to rated voltage, \(\pi_{{\text{C}}}\) is the contact construction factor. The temperature factor \(\pi_{{\text{T}}}\) is given by
where
where PD, is the power dissipated across diode.
The failure rate of capacitor (λcap failures/million hours) is given by
where \(\pi_{{\text{C}}}\) is the capacitance factor given by (C in µF)0.23, \(\pi_{{{\text{SR}}}}\) is the series resistance factor and \(\pi_{{\text{V}}}\) is the voltage stress factor given by
where S is ratio of the operating voltage to the rated voltage.
The temperature factor \(\pi_{{\text{T}}}\) is given by
The failure rate of the system with N number of inputs is given by
where suffix i is the ith input and suffix b indicates the boost element in the converter. The parameters used for the calculation of reliability are listed in Table
6.
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Naidu, P.G., Saibabu, C. & Satyanarayana, S. A single phase five-level inverter with single and multiple switch fault tolerance capabilities. Electr Eng 103, 3139–3150 (2021). https://doi.org/10.1007/s00202-021-01295-5
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DOI: https://doi.org/10.1007/s00202-021-01295-5