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A pick-and-place process control based on the bootstrapping method for quality enhancement in surface mount technology

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Abstract

The electronics manufacturing industry has undergone a transition towards lead-free processes and miniaturization; these changes require advancements in assembly techniques. Recent studies have identified that solder paste misalignment leads to larger component shifting, particularly observed with small passive components, resulting in more frequent quality rejections based on Institute of Printed Circuits standards. To address these challenges, various placement methods have been introduced. Among these, the AI-based mounter optimization module emerges as a leading approach, leveraging advanced machine learning methods to optimize component placement. However, it requires a substantial design of experiments and intentionally applies solder paste and chip placement offsets, which can lead to lower assembly quality, increased rework, or higher scrap rates. This paper proposes a placement method that collects real-time data from all inspection machines and positions a component considering the displacement occurring during the reflow process to reduce component misalignment after soldering. The proposed method utilizes a statistical approach by estimating the upper and lower confidence intervals for the average self-alignment degree and updates the chip placing location without requiring the design of experiments. The purpose of this study is to develop a placement method that enhances assembly quality, such as side overhang and end overlap, under solder paste misalignment. The proposed method is compared with the industry-standard placement method to demonstrate its effectiveness in improving assembly quality.

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Acknowledgements

Thanks to all the workmates and advisors who dedicated their precious time to this research and provided insightful suggestions. All their work contributes greatly to this article. This work was supported in part by Koh Young Technology, Inc., Seoul, South Korea, and in part by the Integrated Electronics Engineering Center for Advanced Technology in Electronics Packaging of Binghamton University.

Funding

This work was partially supported by the Integrated Electronics Engineering Center (IEEC) pooled research grant at Binghamton University and Koh Young Technology Inc.

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Authors and Affiliations

  1. Industrial Systems Engineering, Binghamton University, 4400 Vestal Pkwy E, Binghamton, 13902, NY, USA

    Jaewoo Kim, Zhenxuan Zhang, Daehan Won, Sangwon Yoon & Yu Jin

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  1. Jaewoo Kim
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  2. Zhenxuan Zhang
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  3. Daehan Won
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  4. Sangwon Yoon
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  5. Yu Jin
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Contributions

Jaewoo Kim: conceptualization experiment design, methodology, data collection, data analysis, visualization, interpretation, writing—original draft. Zhenxuan Zhang: material preparation, experiment design, data collection, review, and editing. Daehan Won: experiment design, data collection, data analysis, writing—review and editing. Sang Won Yoon: supervision, project administration, funding acquisition. Yu Jin: writing—review and editing

Corresponding author

Correspondence to Daehan Won.

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We declare that the papers we submitted are my research work under the guidance of the instructor and the research results we have obtained. We confirm that this article has not been published previously and is not being submitted for publication elsewhere. We have not been considered elsewhere except in The International Journal of Advanced Manufacturing Technology. We confirm that this article has had the full consent of all authors. If this article is accepted, we confirm that it will not be published elsewhere in the same form, in English, or in any other language, without the written consent of the publisher.

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Kim, J., Zhang, Z., Won, D. et al. A pick-and-place process control based on the bootstrapping method for quality enhancement in surface mount technology. Int J Adv Manuf Technol (2024). https://doi.org/10.1007/s00170-024-13767-6

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