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A capacity evaluation and trading model for semiconductor foundry manufacturing

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Abstract

This study addresses a capacity-trading problem for semiconductor foundry manufacturing. Because of the geographic proximity of fabs, a semiconductor foundry with insufficient capacity can purchase capacity from partner fabs as a short-term solution if a capacity-trading agreement has been established. Capacity-trading with partners could be considered as a source for enhancing competitiveness of factory clusters. This investigation presents several linear programming and mixed integer liner programming formulations for establishing the capacity-trading platform. This research was implemented via a computer program with real factory data using mathematical programming formulations capable of rapidly generating reliable solutions. The proposed trading model involves three modules. The first module, a factory scheduling module, allows planners to make capacity outsourcing decisions. Secondly, a tradable capacity economic analysis module identifies capacity requirements and evaluates tradable capacity. Thirdly, optimal resource allocation is obtained using a combinatorial auction module. This research makes two main contributions. A capacity-trading model is to integrate several mathematical programming modules in capacity auction. In addition, this model is presented for short-term flexibility of capacity expansion and combinatorial purchase strategies are designed to solve the large-scale problem.

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Authors and Affiliations

  1. Graduate Institute of Business Administration, National Taiwan University, No.1, Sec. 4, Roosevelt Rd., Taipei, 106, Taiwan, Republic of China

    Ai-Hsuan Chiang & Wun-Hwa Chen

  2. Institute of Industrial Engineering, National Taiwan University, No.1, Sec. 4, Roosevelt Rd., Taipei, 106, Taiwan, Republic of China

    Yon-Chun Chou

Authors
  1. Ai-Hsuan Chiang
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  2. Yon-Chun Chou
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  3. Wun-Hwa Chen
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Correspondence to Ai-Hsuan Chiang.

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Chiang, AH., Chou, YC. & Chen, WH. A capacity evaluation and trading model for semiconductor foundry manufacturing. Int J Adv Manuf Technol 54, 1–10 (2011). https://doi.org/10.1007/s00170-010-2942-6

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  • DOI: https://doi.org/10.1007/s00170-010-2942-6

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