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Hybrid ADDer: A Viable Solution for Efficient Design of MAC in DNNs

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Abstract

This research article proposes a solution for efficient hardware implementation of deep neural networks (DNNs) in Edge-AI applications. An effective Hybrid ADDer (HADD) block for accumulation in fixed-point multiply-accumulate (MAC) operation is developed to overcome area and power limitations. The proposed HADD design offers a considerable reduction in area and power consumption, with a tolerable accuracy loss and reduced latency. The inference results show an accuracy of 96.97 and 96.64% for MNIST and A-Z Handwritten Alphabet datasets, respectively, using the LeNet-5 DNN model. Compared to the conventional adder implementation, the proposed HADD design reduces area utilization by 44% and power consumption by 51%, with a reduction in delay of 19% for 8-bit precision at 180 nm. For the same bit precision, the proposed design reduces area by 31%, power consumption by 34%, and delay by 8.1% at 45 nm. The proposed design further investigates edge detection applications, and the results for different standard images were promising. Overall, the proposed accumulator arithmetic block is a viable solution for error-tolerant AI applications, including DNN for image classification, object recognition, and other image-processing applications.

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Data Availability

Data sharing is not applicable to this article as no data sets were generated or analyzed during the current study, and detailed circuit simulation results are given in the manuscript.

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Acknowledgements

The authors would like to thank the Indo-South Korea Joint Network Center for Environmental Cyber-Physical Systems (INT/Korea/JNC/CPS), Department of Science and Technology, Government of India, for providing financial support.

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Authors and Affiliations

  1. Department of Electrical Engineering, IIT Indore, Indore, India

    Vasundhara Trivedi, Khushbu Lalwani, Gopal Raut, Avikshit Khomane, Neha Ashar & Santosh Kumar Vishvakarma

  2. Centre for Development of Advanced Computing, Bangalore, India

    Gopal Raut

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  1. Vasundhara Trivedi
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  2. Khushbu Lalwani
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  3. Gopal Raut
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Correspondence to Santosh Kumar Vishvakarma.

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Trivedi, V., Lalwani, K., Raut, G. et al. Hybrid ADDer: A Viable Solution for Efficient Design of MAC in DNNs. Circuits Syst Signal Process 42, 7596–7614 (2023). https://doi.org/10.1007/s00034-023-02469-1

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