Abstract
This article combines algorithm development, thorough analysis and implementation of sign-bit (SB) estimation techniques for symbol timing, carrier frequency offset (CFO) and signal-to-noise ratio (SNR) in orthogonal frequency division multiplexing receivers. The SB estimation is compared in terms of performance and hardware complexity to an equivalent implementation with higher quantization. The techniques are demonstrated by simulation of a SB time/frequency and SB-SNR estimator for 3rd Generation Partnership Project long-term evolution (LTE) cell search in 65-nm technology operating at nominal voltage of 1.2 V. According to post-layout power simulations with toggling information, the architecture estimates the corresponding CFO and SNR for as little as \(479\,\upmu \hbox {W}\) average power for LTE-R8/10, while occupying a silicon area as small as \(0.03\,\hbox {mm}^2\). Even though SB estimation experiences some relative performance penalty when compared to 8-bit quantization, this paper demonstrates various advantages and the potential of employing these techniques in low-complexity terminals.
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Notes
Bias is defined as the difference between the estimator’s expected value and the true value.
Strength reduction is a known optimization technique where complex operations are replaced by equivalent but simpler and less expensive operations [10].
A change of sign is perceived as a nonzero result from the subtraction (see Sect. 3.2.2).
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Diaz, I., Wilhelmsson, L.R., Sofotasios, P.C. et al. A New Approach to Sign-Bit-Based Parameter Estimation in OFDM Receivers. Circuits Syst Signal Process 34, 3631–3660 (2015). https://doi.org/10.1007/s00034-015-0025-5
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DOI: https://doi.org/10.1007/s00034-015-0025-5