Abstract
This paper reports on algorithmic approaches for the routing problem of VLSI-logic-chips using combinatorial optimization techniques.
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Froleyks, B., Korte, B. & Prömel, H.J. Routing in VLSI-layout. Acta Mathematicae Applicatae Sinica 7, 53–66 (1991). https://doi.org/10.1007/BF02080203
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DOI: https://doi.org/10.1007/BF02080203