Abstract
The designing size and integration complexity of integrated circuits (IC’s) offers a complex challenge for global and combinatorial problems for the idea of optimization. As the fabrication of Integrated circuits reaches in the nm scale, there is increased opportunity for scalable and adaptable algorithms for regulate the space and timing constraints in VLSI physical design. In this paper a review on recent advances in multi-scale algorithms for betterment in partitioning, placement, and routing are studied. Experimentations for algorithms such as Nearest Neighbor, Simulated Annealing and Discrete State Transition Algorithms are carried out to test the performance, This investigation has been carried out by using MATLAB software with optimization tool box using Travelling salesman problem.
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Karimullah, S., Vishnuvardhan, D. (2020). Experimental Analysis of Optimization Techniques for Placement and Routing in ASIC Design. In: Kumar, A., Paprzycki, M., Gunjan, V. (eds) ICDSMLA 2019. Lecture Notes in Electrical Engineering, vol 601. Springer, Singapore. https://doi.org/10.1007/978-981-15-1420-3_99
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DOI: https://doi.org/10.1007/978-981-15-1420-3_99
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