Features that provide fault tolerance of self-synchronizing circuits

Abstract

To use the full potential of self-synchronized circuits (SSCs), which are often presented as being highly reliable, special methods for increasing reliability and providing fault tolerance need to be developed. They should make effective use of all the possibilities of a self-synchronized circuit structure. self-synchronized digital devices will then become a good choice in critical areas such as aerospace microelectronics. In terms of reliability, the existence of indicators and dual-rail data channels is a significant difference between SSCs and synchronous circuits. The paper is focused on “passive” fault tolerance of self-synchronized devices that are applied in hardware without permitting cessation in the course of further reconfiguration (self-repair). Variants of providing SSC fault tolerance from the probability indices of nonfailure operation and difficulty in circuit reservation and self-synchronizing (quasiand strongly self-synchronized solution) are assessed.