Abstract—
A 32-channel 12-bit ADC-32ATC analog-to-digital conversion module with signal shape digitization at 40 MHz, which was been developed for the VES experiment at the U-70 accelerator, is presented. The analog shapers for this module, the measurement methods, the data-processing techniques, and the experience gained in using this module in the VES experiment are described. The module is intended to register single pulses with a stable shape or a linear combination of a few such pulses with positive coefficients. It can be used for calorimeters, as well as for Cherenkov and scintillation counters, in fixed-target experiments in high-energy physics.
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Notes
Abbreviations and notations used in the paper are also given in the Appendix.
Semak, A.A., private communication.
SPILL is used here to denote this stage or a portion of recorded data associated with it.
The normal and jumbo frames are frames with a maximum payload of 1500 and 8192 bytes, respectively.
The thickness of the EMC counter downstream of the beam is approximately one nuclear interaction length.
Ivashin, A.V., private communication.
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ACKNOWLEDGMENTS
We are grateful to N.E. Filimonov for the mounting of the SADC and shaper modules and to V.G. Gotman for his participation in their testing.
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Translated by N. Goryacheva
THE LIST OF ABBREVIATIONS AND SYMBOLS
THE LIST OF ABBREVIATIONS AND SYMBOLS
(VES) vertex spectrometer is the experiment with a fixed target on the U-70 accelerator, which operates on the secondary beam of negatively charged pions with a momentum of 29 GeV/c;
(ADC) analog-to-digital converter;
(SADC) sampling ADC;
(IADC) integrating ADC;
(FPGA) field programmable gate array, one of the possible programmable logic architectures;
(CPU) central processor unit;
(DDR SDRAM) double data rate synchronous dynamic random-access memory;
(DDR2 SDRAM) DDR SDRAM version 2;
(DMA) direct memory access;
(EEPROM) electrically erasable programmable read-only memory;
(Flash ROM) flash read-only memory, one of the EEPROM types;
(GPIO) general purpose input/output, a general purpose signal;
(ECC) error correcting code;
(IRQ) interrupt request;
(JTAG) IEEE 1149.1 boundary scan interface;
(LAB) logic array block, a structural unit of a Cyclone III FPGA;
(SPI) serial peripheral interface;
(USB) universal serial bus;
(TDL) tapped delay line;
(MC) microcontroller;
(DAQ) data acquisition system;
(PLL) phase locked loop;
(EMC) electromagnetic calorimeter.
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Volkov, E.V., Eremeev, D.R., Ivashin, A.V. et al. An Analog-to-Digital Converter Module with Signal Shape Digitization for the VES Experiment. Instrum Exp Tech 63, 165–182 (2020). https://doi.org/10.1134/S0020441220020062
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DOI: https://doi.org/10.1134/S0020441220020062