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Potential Analysis of Double Gate Vertical TFET Using 2-D Modeling for Low Power Application

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Abstract

The present paper analyzes the 2-dimensional surface potential model designed using Double Gate Vertical TFET (DGV-TFET). The proposed model using the Matlab tool possesses an inherited trait of TFET, namely the dual modulation effect. The dual modulation effect describes a control over the surface potential of biasing voltages utilized to compute a tunneling depletion width value upon source and drain junctions. Hence, the device tunneling current exploits the potential model to derive the current model. The parabolic approximation methods are utilized to evaluate 2-D Poisson equations for proper boundary conditions. The present paper analyzes surface potential outline dependence upon different device metrics by changing device materials, gate/drain-source potential, gate oxide permittivity, and gate electrode work-function. Resultingly, the channel’s surface potential is derived considering an accurate change in gate and drain biases. Thus, the proposed model efficiency is confirmed by describing results analytically in favour of simulations.

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Authors and Affiliations

  1. Department of Electronics and Telecommunication Engineering, Jhada Sirha Government Engineering College Jagdalpur, Chhattisgarh, India

    Hitesh Kumar, Abhishek Kumar Verma, Ashish Patle & Somendra Kumar Soni

  2. Department of Electronics and Telecommunication Engineering, Chitkara University Institute of Engineering and Technology, Chitkara University, Chandigarh, Punjab, India

    Girish Wadhwa

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  1. Hitesh Kumar
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Kumar, H., Verma, A.K., Patle, A. et al. Potential Analysis of Double Gate Vertical TFET Using 2-D Modeling for Low Power Application. Trans. Electr. Electron. Mater. 24, 314–322 (2023). https://doi.org/10.1007/s42341-023-00449-5

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