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A Multi-functional Multi-precision 4D Dot Product Unit with SIMD Architecture

  • Research Article - Computer Engineering and Computer Science
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Abstract

The floating-point (FP) four-dimensional vector inner product (4D dot product; DP4) is one of the most frequently performed operations in 3D graphics applications. Therefore, the hardware implementation of FP DP4 unit can be used in modern graphics processing units (GPUs) to speed up the performance. Unfortunately, the FP DP4 unit is power hungry and how to reduce its power consumption becomes very critical for the mobile GPUs. In this paper, a multi-functional multi-precision DP4 unit with single instruction multiple data (SIMD) architecture is proposed. Instead of additional discrete FP multipliers, adders, and multiply-add-fused units, the proposed architecture can perform not only one-way DP4 but also four-way multiplication, addition, and multiply-add-fused operations to decrease the hardware area. In addition, the proposed architecture can perform the above-mentioned FP operations with four precision modes (i.e., 23-, 18-, 13- and 7-bit modes) to reduce the power and energy consumptions when a little image distortion is allowable. The proposed design is fully pipelined with a latency of three cycles, a throughput of one cycle, and a cycle time of 2.8 ns in 90 nm CMOS technology. When compared with the one-precision DP4 unit, the proposed multi-precision DP4 unit can save about 7.2, 18.5, 32.2, and 49.6 % power consumption on average for 23-, 18-, 13- and 7-bit precision modes, respectively, at the expense of 3.7 % more area and 7.7 % longer delay.

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Authors and Affiliations

  1. Department of Computer Science and Engineering, National Sun Yat-sen University, Kaohsiung, 804, Taiwan

    Shiann-Rong Kuang, Chih-Yuan Liang & Ming-Fong Chang

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  1. Shiann-Rong Kuang
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  2. Chih-Yuan Liang
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  3. Ming-Fong Chang
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Correspondence to Shiann-Rong Kuang.

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Kuang, SR., Liang, CY. & Chang, MF. A Multi-functional Multi-precision 4D Dot Product Unit with SIMD Architecture. Arab J Sci Eng 41, 3139–3151 (2016). https://doi.org/10.1007/s13369-016-2117-3

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  • DOI: https://doi.org/10.1007/s13369-016-2117-3

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