Abstract
A hardware/software field programmable gate array (FPGA)-based driver system was proposed and demonstrated for the KAF-39000 large area high resolution charge coupled device (CCD). The requirements of the KAF-39000 driver system were analyzed. The structure of “microprocessor with application specific integrated circuit (ASIC) chips” was implemented to design the driver system. The system test results showed that dual channels of imaging analog data were obtained with a frame rate of 0.87 frame/s. The frequencies of horizontal timing and vertical timing were 22.9 MHz and 28.7 kHz, respectively, which almost reached the theoretical value of 24 MHz and 30 kHz, respectively.
Article PDF
Similar content being viewed by others
Avoid common mistakes on your manuscript.
References
J. A. Kalomiros and J. Lygouras, “Design and evaluation of a hardware-software FPGA-based system for fast image processing,” Microprocessors and Microsystems, 2008, 32(2): 95–106.
B. M. Miller and E. Y. Rubinovich, “Image motion compensation at charge-coupled device photographing in delay-integration mode,” Automation and Remote Control, 2007, 7(1): 45–54.
E. Miyata, C. Natsukar, and D. Akutsu, “Fast and flexible CCD-driver system using fast DAC and FPGA,” Nuclear Instruments and Methods in Physics Research A, 2001, 459(1-2): 157–164.
H. M. Wey and W. Guggenbuhl, “An improved correlated double sampling circuit for low noise charge-coupled devices,” IEEE Transactions on Circuits and Systems, 1990, 37(12): 1559–1565.
M. A. Vega-Rodriguez, J. M. Sanchez-Perez, and J. A. Gomez-Pulido, “Real time image processing with reconfigurable hardware,” The 8th IEEE International Conference on Electronics, Circuits and Systems, 2001, 1: 213–216.
G. E. Healey and R. Kondepudy, “Radiometric CCD camera calibration and noise estimation,” IEEE Transactions on Pattern Analysis and Machine Intelligence, 2005, 16(3): 267–276.
H. Faraji and W. J. MacLean, “CCD noise removal in digital images,” IEEE Transactions on Imaging Processing, 2006, 15(9): 2676–2685.
Author information
Authors and Affiliations
Corresponding author
Additional information
This article is published with open access at Springerlink.com
Rights and permissions
Open Access This article is distributed under the terms of the Creative Commons Attribution 4.0 International License (https://creativecommons.org/licenses/by/4.0), which permits use, duplication, adaptation, distribution, and reproduction in any medium or format, as long as you give appropriate credit to the original author(s) and the source, provide a link to the Creative Commons license, and indicate if changes were made.
About this article
Cite this article
Chen, Y., Xu, W., Zhao, R. et al. Design of a hardware/software FPGA-based driver system for a large area high resolution CCD image sensor. Photonic Sens 4, 274–280 (2014). https://doi.org/10.1007/s13320-014-0202-3
Received:
Revised:
Published:
Issue Date:
DOI: https://doi.org/10.1007/s13320-014-0202-3