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The Investigation of Gate Oxide and Temperature Changes on Electrostatic and Analog/RF and Behaviour of Nanotube Junctionless Double-Gate-All Around (NJL-DGAA) MOSFETs using Si Nano-materials

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Abstract

Nanotube Junction-less Double-Gate-All-Around (NJL-DGAA) MOSFETs using Si nanomaterials or nano particle emerged as an appealing option for the design of high-speed ULSI processors. Changes in ambient temperature, on the other hand, have an effect on its performance such as hot carrier injection (HCI) degradation, analog/RF performance, and electrostatic performance that must be examined. The influence of temperature and oxide changes on the performance parameters of the Nanotube Junctionless Double-Gate-All-Around (NJL-DGAA) MOSFET has been investigated in this research for performance enhancement utilising the Silvaco 3D simulator. NJL-DGAA MOSFETs are evaluated for a variety of parameters including subthreshold swing (SS), ON-current, DIBL, OFF-current, and transconductance at temperatures changes from 250°K to 350° K. In addition, the analog/RF performance of NJL-DGAA MOSFETs for various semiconductor high k gate dielectric materials was investigated. Enhance thickness of the oxide layer with a high semiconductor dielectric constant to equivalent-oxide-thickness (EOT) and reduce leakage current, which are correlated with transistor speed. According to the performance evaluation, NJL-DGAA provides better analog/RF performance for high-frequency and low-power applications at high k gate dielectric material.

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Authors and Affiliations

  1. Department of Electronics Engineering, Rajkiya Engineering College, Sonbhadra, Uttar Pradesh, 231206, India

    Abhinav Gupta

  2. Department of Applied Science and Humanities, Rajkiya Engineering College, Ambedkar Nagar, Akbarpur, Uttar Pradesh, 224122, India

    Amit Kumar Pandey & Vishal Singh Chandel

  3. Department of Electronics and Communication, Atria Institute of Technology, Bangalore, India

    Shipra Upadhyay

  4. Department of Electronics and Communication Engineering, Pranveer Singh Institute of Technology, Kanpur, Dr. A P J Abdul Kalam Technical University, Lucknow, Uttar Pradesh, 226031, India

    Vidyadhar Gupta

  5. Department of Electronics and Communication, Maulana Azad National Institute of Technology, Bhopal, India

    Tarun Kumar Gupta

  6. Department of Technical Education, IET, Dr. A. P. J. Abdul Kalam Technical University Lucknow, Lucknow, India

    Digvijay Pandey

  7. Department of Electronics and Communication Engineering, Integral University, Lucknow, India

    Shrish Bajpai

Authors
  1. Abhinav Gupta
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  2. Amit Kumar Pandey
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  4. Vidyadhar Gupta
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  8. Vishal Singh Chandel
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Contributions

All authors have made substantial contributions to the conception and design, or acquisition of data, or analysis and interpretation of data. Authors Abhinav Gupta, Amit Kumar Pandey, Shipra Upadhyay. Vidyadhar Gupta and Tarun Kumar Gupta have been involved in drafting the manuscript. Digvijay Pandey, Shrish Bajpai, and Vishal Singh Chandel have involved in revising the content of manuscript and have given final approval of the version to be published. Each author has participated sufficiently in the work to take public responsibility for appropriate portions of the content. All authors read and approved the final manuscript.

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Correspondence to Amit Kumar Pandey.

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Gupta, A., Pandey, A.K., Upadhyay, S. et al. The Investigation of Gate Oxide and Temperature Changes on Electrostatic and Analog/RF and Behaviour of Nanotube Junctionless Double-Gate-All Around (NJL-DGAA) MOSFETs using Si Nano-materials. Silicon 15, 5197–5208 (2023). https://doi.org/10.1007/s12633-023-02436-0

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