Abstract
This research investigates the virtually doped dual gate junctionless impact ionization MOS (DG-JL-IMOS). Virtually doped source and drain regions are realized through the genesis of charge plasma using different work-functions for their electrodes, easing the process complexity with simultaneous reduction of process-induced variations to implant uniform doping. The proposed DG-JL-IMOS device exhibits two order increase in \(I_{ON}/I_{OFF}\) ratio at a lower source bias of \(-4.5\) V with respect to \(-5\) V required for a single gate JIMOS device. This work further examines the breakdown behavior of the proposed DG-JL-IMOS by analyzing carrier density distribution, impact ionization, and electric field profile through extensive TCAD simulations. The proposed device exhibits a super steep sub-threshold swing (SS) of 0.6 mV/dec over several orders of drain current, which is not achieved by any other counterpart steep-slope technologies. The effect of interface traps on the proposed DG-JL-IMOS is studied and investigated for hysteresis in the transfer characteristics. Furthermore, analog parameters such as transconductance (\(g_{m}\)), unity gain cutoff-frequency (\(f_{T}\)), and current gain of the proposed device are evaluated and compared with conventional DG-IMOS. It is observed that the proposed device shows a \(2.6\times \) increase in \(I_{ON}\), \(1.7\times \) higher \(g_{m}\), \(1.6\times \) higher \(f_{T}\), and a 5 dB improvement in current gain compared to conventional DG-IMOS. The proposed DG-JL-IMOS device breakdowns at a voltage, (\(V_{BD}\)) of \(-4.21\) V, whereas DG-IMOS breakdowns at \(-4.75\) V. The enhanced performance metrics of DG-JL-IMOS elucidate its suitability for high-speed and high-performance analog applications.
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Acknowledgements
We are grateful for the support provided by “The Department of Electronics and Communication Engineering, Malaviya National Institute of Technology, Jaipur.”
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Dasari Srikanya (first author) proposed and performed this work. Regarding simulations and data accomplishment, Nawaz Shafi supported the needed assistance. Dr. Chitrakant Sahu supervised this research and significantly improved the final paper through discussions and suggestions.
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Srikanya, D., Shafi, N. & Sahu, C. Design and Performance Projection of Virtually Doped Dual Gate Junctionless IMOS. Silicon 15, 6061–6072 (2023). https://doi.org/10.1007/s12633-023-02364-z
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DOI: https://doi.org/10.1007/s12633-023-02364-z