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Exploring the Self-Heating Effects & Its Impact on Thermal Noise for Dielectric Pocket Packed Double-Gate-All-Around (DPP-DGAA) MOSFETs

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Abstract

Dielectric Pocket Packed Double-Gate-All-Around (\({\varvec{D}}{\varvec{P}}{\varvec{P}}-{\varvec{D}}{\varvec{G}}{\varvec{A}}{\varvec{A}}\)) MOSFETs are one of the preferred choices for ULSI applications because of significantly low off-current, reduced power dissipation, and high immunity to short channel effect. However, \({\varvec{D}}{\varvec{P}}{\varvec{P}}-{\varvec{D}}{\varvec{G}}{\varvec{A}}{\varvec{A}}\) suffer from self-heating due to the unavailability of appropriate heat take-out tracks. This Paper analysis the effect of self-heating (SHEs) for \({\varvec{D}}{\varvec{P}}{\varvec{P}}-{\varvec{D}}{\varvec{G}}{\varvec{A}}{\varvec{A}}\) MOSFETs by electro-thermal (ET) simulations with hydrodynamic and thermodynamic transport models. The electrothermal characteristics against various device dimensions such as spacer size, device width,thermal resistance of the contacts, and drain voltage have been investigated. The effect of SHE on the drive current has also been evaluated. Further, Self-heating impacts on thermal noise have been analyzed in detail using Sentauras TCAD simulator.

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The authors declare that all procedures followed were in accordance with the ethical standards.

References

  1. Moore More (2017) International Roadmap for Devices and Systems (IRDS). https://irds.ieee.org/images/files/pdf/2017/2017IRDS_ES.pdf. Accessed 09 March 2021

  2. Kim Y-B (2010) Challenges for nanoscale MOSFETs and emerging nanoelectronics. Trans Electron Electron Mater 11:93–105. https://doi.org/10.4313/TEEM.2010.11.3.093

    Article  Google Scholar 

  3. Song Y, Choi WY, Park JH, Lee JD, Park BG (2006) Design optimization of Gate-all-around (GAA) MOSFETs. IEEE Trans Nanotechnol 5(3):186–191. https://doi.org/10.1109/TNANO.2006.869952

    Article  Google Scholar 

  4. Colinge JP (2004) Multiple-gate SOI MOSFETs. Solid-State Electron 48:897–905. https://doi.org/10.1016/j.sse.2003.12.020

    Article  CAS  Google Scholar 

  5. Colinge JP (2007) Multiple-gate SOI MOSFETs. Microelectron Eng 84:2071–2076. https://doi.org/10.1016/j.mee.2007.04.038

    Article  CAS  Google Scholar 

  6. Colinge JP. FinFET and other multi-gate transistors. Springer-Verlag, New York

  7. Kumar N, Awasthi H, Purwar V et al (2021) Modeling the threshold voltage of core-and-outer gates of ultra-thin nanotube Junctionless-double gate-all-around (NJL-DGAA) MOSFETs. Microelectron J. https://doi.org/10.1016/j.mejo.2021.105104

    Article  Google Scholar 

  8. Jimenez D, Jimenez J, Saenz J, Iniguez B, Sune J, Marsal LF, Pallares J (2004) Modeling nanoscale gate-all-around MOSFETs. IEEE Electron Device Lett 25(5):314–316. https://doi.org/10.1109/LED.2004.826526

    Article  Google Scholar 

  9. Lu W, Xie P, Lieber CM (2008) Nanowire transistor performance limits and applications. IEEE Trans Electron Devices 55(11):2859–2876. https://doi.org/10.1109/TED.2008.2005158

    Article  CAS  Google Scholar 

  10. Awasthi H, Kumar N, Purwar V, Gupta R, Dubey S (2020) Impact of temperature on analog/RF performance of dielectric pocket gate-all-around (DPGAA) MOSFETs. Silicon. https://doi.org/10.1007/s12633-020-00610-2

    Article  Google Scholar 

  11. Purwar V, Gupta R, Kumar N, Awasthi H, Dixit VK, Singh K, Dubey S, Tiwari PK (2020) Investigating linearity and effect of temperature variation on analog/RF performance of dielectric pocket high-k double gate-all-around (DP-DGAA) MOSFETs. Appl Phys A 126:746. https://doi.org/10.1007/s00339-020-03929-0

    Article  CAS  Google Scholar 

  12. Kumar N, Awasthi H, Purwar V et al (2021) Impact of temperature variation on analog, hot-carrier injection and linearity parameters of nanotube junctionless double-gate-all-around (NJL-DGAA) MOSFETs. Silicon. https://doi.org/10.1007/s12633-021-01069-5

    Article  Google Scholar 

  13. Kumar A, Srinivas PSTN, Tiwari PK (2019) An insight into self-heating effects and its implications on hot carrier degradation for silicon-nanotube-based double gate-all-around (DGAA) MOSFETs. IEEE J Elect Device Soc 7:1100–1108. https://doi.org/10.1109/JEDS.2019.2947604

    Article  CAS  Google Scholar 

  14. Rhyner R, Luiser M (2016) Minimizing self-heating and heat dissipation in ultrascaled nanowire transistors. Nano Lett 16:1022–1026. https://doi.org/10.1021/acs.nanolett.5b04071

    Article  CAS  PubMed  Google Scholar 

  15. Jiang H, Shin S, Liu X, Zhang X, Alam MA (2016) Characterization of self-heating leads to universal scaling of HCI degradation of multi-fin SOI FinFETs. Proc Int Reliab Phys Electron Symp 1:2A.3.1-2A.3.7. https://doi.org/10.1109/IRPS.2016.7574506

    Article  Google Scholar 

  16. Shrivastava M, Agrawal M, Mahajan S, Gossner H, Schulz T, Sharma DK, Rao VR (2012) Physical insight toward heat transport and an improved electrothermal modeling framework for FinFET architectures. IEEE Trans Electron Devices 59:1353–1363. https://doi.org/10.1109/TED.2012.2188296

    Article  CAS  Google Scholar 

  17. Nakagome Y, Takeda Y, Kume H, Asai S (1983) New observation of hot-carrier injection phenomena. Jpn J Appl Phys 22:99. https://doi.org/10.7567/JJAPS.22S1.99

    Article  CAS  Google Scholar 

  18. Venkateswarlu S, Sudarsanan A, Singh SG, Nayak K (2018) Ambient temperature-induced device self-heating effects on multi-Fin Si n-FinFET performance. IEEE Trans Electron Devices 65:2721–2728. https://doi.org/10.1109/TED.2018.2834979

    Article  CAS  Google Scholar 

  19. Purwar V, Gupta R, Tiwari PK et al (2021) Investigating the impact of self-heating effects on some thermal and electrical characteristics of dielectric pocket gate-all-around (DPGAA) MOSFETs. Silicon. https://doi.org/10.1007/s12633-021-01493-7

    Article  Google Scholar 

  20. Braccioli M, Curatola G, Yang Y, Sangiorgi E, Fiegna C (2009) Simulation of self-heating effects in different SOI MOS architectures. Solid-State Electron 53(4):445–545. https://doi.org/10.1016/j.sse.2008.09.020

    Article  CAS  Google Scholar 

  21. Jin W, Chan PCH, Lau J (2000) Physical thermal noise model for SOI MOSFET. IEEE Trans Electron Devices 47(4):768–773. https://doi.org/10.1109/16.830992

    Article  Google Scholar 

  22. Gola D, Singh B, Srinivas PSTN, Tiwari PK (2020) Thermal noise models for trigate junctionless transistors including substrate bias effects. IEEE Trans Electron Devices 67(1):263–269. https://doi.org/10.1109/TED.2019.2953084

    Article  Google Scholar 

  23. Park JY, Lee BH, Chang KS, Kim DU, Jeong C, Kim CK, Bae H, Choi YK (2017) Investigation of Self-heating effects in gate-all-around MOSFETs with vertically stacked multiple silicon nanowire channels. IEEE Trans Electron Devices 64(11):4393–4399. https://doi.org/10.1109/TED.2017.2749324

    Article  CAS  Google Scholar 

  24. Shin SH, Wahab MA, Masuduzzaman M, Maize K, Gu J, Si M, Shakouri A, Ye PD, Alam MA (2015) Direct observation of self-heating in III-V Gate-all-around Nanowire MOSFETs. IEEE Trans Electron Devices 62(11):3516–3523. https://doi.org/10.1109/IEDM.2014.7047088

    Article  Google Scholar 

  25. Kompala BK, Kushwaha P, Agarwal H, Khandelwa LS, Duarte J-P, Hu C, Chauhan YS (2016) Modeling of nonlinear thermal resistance in FinFET. Jpn J Appl Phys 55(4):04ED11. https://doi.org/10.7567/JJAP.55.04ED11

    Article  CAS  Google Scholar 

  26. Pala MG, Cresti A (2015) increase of self-heating in nanodevice induced by surface roughness: a full quantum study. J Appl Phys 117:084313. https://doi.org/10.1063/1.4913511

    Article  CAS  Google Scholar 

  27. Jiang PC, Lai YS, Chen JS (2006) Dependence of crystal structure and work function of WNX films on the nitrogen content. Appl Phys Lett 89:122107. https://doi.org/10.1063/1.2349313

    Article  CAS  Google Scholar 

  28. Sentaurus Device User Guide, Version N-2017.09, Synopsys, Mountain View, CA, USA, 2016

  29. Fahad HM, Smith CE, Rojas JP, Hussain MM (2011) Silicon nanotube field effect transistor with core-shell gate stacks for enhanced high-performance operation and area scaling benefits. Nano Lett 11:4393–4399. https://doi.org/10.1021/nl202563s

    Article  CAS  PubMed  Google Scholar 

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All authors have made substantial contributions to the conception and design, or acquisition of data, or analysis and interpretation of data; have been involved in drafting the manuscript or revising it critically for important intellectual content; and have given final approval of the version to be published. Each author has participated sufficiently in the work to take public responsibility for appropriate portions of the content. All authors read and approved the final manuscript.

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Correspondence to Vaibhav Purwar.

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Purwar, V., Gupta, R., Tiwari, P.K. et al. Exploring the Self-Heating Effects & Its Impact on Thermal Noise for Dielectric Pocket Packed Double-Gate-All-Around (DPP-DGAA) MOSFETs. Silicon 14, 10217–10224 (2022). https://doi.org/10.1007/s12633-022-01727-2

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