On the structural and electrical properties of metal–ferroelectric–high k dielectric–silicon structure for non-volatile memory applications

Abstract

In this article, we report the structural and electrical properties of metal–ferroelectric–high k dielectric–silicon (MFeIS) gate stack for non-volatile memory applications. Thin film of sputtered $\hbox {SrBi}_{2}\hbox {Nb}_{2}\hbox {O}_{9}$ (SBN) was used as ferroelectric material on 5–15 nm thick high-k dielectric ($\hbox {Al}_{2}\hbox {O}_{3}$) buffer layer deposited using plasma-enhanced atomic layer deposition (PEALD). The effect of annealing on structural and electrical properties of SBN and $\hbox {Al}_{2}\hbox {O}_{3}$ films was investigated in the temperature range of 350–$1000^{{\circ }}\hbox {C}$. X-ray diffraction results of the SBN and $\hbox {Al}_{2}\hbox {O}_{3}$ show multiple phase changes with an increase in the annealing temperature. Multiple angle ellipsometry data show the change in the refractive index (n) of SBN film from 2.0941 to 2.1804 for non-annealed to samples annealed at $600^{{\circ }}\hbox {C}$. For $\hbox {Al}_{2}\hbox {O}_{3}$ film, $n < 1.7$ in the case of PEALD and $n > 1.7$ for sputtered film was observed. The leakage current density in MFeIS structure was observed to two orders of magnitude lower than metal/ferroelectric/silicon (MFeS) structures. Capacitance–voltage (C–V) characteristics for the voltage sweep of −10 to 10 V in dual mode show the maximum memory window of 1.977 V in MFeS structure, 2.88 V with sputtered $\hbox {Al}_{2}\hbox {O}_{3}$ and 2.957 V with PEALD $\hbox {Al}_{2}\hbox {O}_{3}$ in the MFeIS structures at the annealing temperature of $500^{{\circ }}\hbox {C}$.