Abstract
CaCu3Ti4O12 (CCTO) thin films were synthesized by a sol–gel method followed with spin-coating and sintering process in order to investigate the effects of sintering temperature and thickness of CCTO thin films on the electrical properties as a varistor. The phase identification and morphology of the films have been characterized using X-ray diffractometer and field emission scanning electron microscope. A semiconductor parameter analyzer was used to determine the non-Ohmic (I–V) behaviors. The results showed that the breakdown voltage firstly decreased and then increased with the rising of sintering temperature and was directly proportional to the thickness of the film. Furthermore, the threshold voltage of each sample exhibited nearly twofold relationship as functions of two different measuring mode, surface-to-surface and surface-to-substrate. The lowest leakage current (I L) and the highest nonlinear coefficient (α) of CCTO thin films were found in the sample sintered at 700 °C. A double Schottky barrier model composed of a depletion layer and a negative charge sheet was employed to explained the non-Ohmic behaviors. A linear relationship between ln(J) and E 1/2 indicated that a Schottky barrier should exist at the grain boundary.
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Xiao, M., Wang, K., Chenyang, X. et al. Nonlinear current–voltage behavior of CaCu3Ti4O12 thin films derived from sol–gel method. J Mater Sci: Mater Electron 25, 2710–2715 (2014). https://doi.org/10.1007/s10854-014-1933-z
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DOI: https://doi.org/10.1007/s10854-014-1933-z