Abstract
A controllable constant-power source in 0.35 μm CMOS technology is presented in this paper. It is based on the resistive mirror method, and suitable for thermally-based sensor applications. Two versions have been developed and fabricated: a high-voltage design with a single supply of 10 V, and a low-voltage design with a single supply of 3.6 V. The measured results for the high voltage (low voltage) design are the following: a generated power dynamic range of 57.5 dB (52.4 dB), a load resistance dynamic range of 15.6 dB (12 dB), a voltage efficiency of 0.7 (0.61), and a relative error of the generated power less than 1.8% (1.8%). The temperature compensation of the controllable constant-power source has been performed for the temperature range 0 °C ≤ T ≤ 50 °C. The stability test has been carried out using a resistive load in pulse mode operation confirming that the stability of the proposed controllable constant-power source is not dependent on either the load resistance or the generated power.
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Acknowledgement
Assistant Professor Milena Erceg would like to thank the Ministry of Science of Montenegro for financing her participation in this project through the BIO-ICT Centre of Excellence (Grant No.01-1001).
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Appendix derivation of the temperature coefficients of the offset voltages
Appendix derivation of the temperature coefficients of the offset voltages
The offset voltage VOFFOA2 of OA2 and its temperature coefficient ∂VOFFOA2/∂T will be derived in this appendix. The derivations of the offset voltage VOFFOA1 of OA1 and its temperature coefficient ∂VOFFOA1/∂T are similar to those of OA2. The derivations of the offset voltage VOFFCCI of the voltage follower part of the CCI and its temperature coefficient ∂VOFFCCI/∂T are similar to those of the differential pair M15–M16 within OA2.
The offset voltage VOFFOA2 of OA2 is presented by the difference of the input voltages VG24 and VG25 of OA2, Fig. 1, required to drive the output voltage of OA2 to the value VOUT2 = VDD − VSG19
where VGS15 and VGS16 are the gate-to-source voltages of M15 and M16, respectively, VSG24 and VSG25 are the source-to-gate voltages of M24 and M25, respectively. So, the offset voltage VOFFOA2 of OA2 consists of two parts: the offset voltage VOFFSF2 caused by the imperfections of the source followers made by M24 and M25 given by
and the offset voltage VOFFDA2 caused by the imperfections of the differential pair M15–M16 expressed as
Consequently, the temperature coefficient ∂VOFFOA2/∂T of the offset voltage of OA2 can be calculated as follows
Assuming a simple quadratic model of saturated MOSFET [18,19,20] and neglecting the channel length modulation, the drain currents ID24 and ID25 of M24 and M25, respectively, are given by
The following expressions for the source-to-gate voltages VSG24 and VSG25 of M24 and M25, respectively, are obtained by solving the quadratic Eqs. (37) and (38)
The relation (39) have been derived assuming β24R5|Vt24| ≫ 1, VB6 + Vt24 ≫ VG24, and 2β24R5(VB6 + Vt24) ≫ 1 (β24 ≈ 0.5 mA/V2, R5 = 20 kΩ, Vt24 = − 1.35 V, VB6 = 3.2 V, VG24 < 100 mV for the HV CCPS, and β24 ≈ 30 mA/V2, R5 = 20 kΩ, Vt24 = − 0.74 V, VB6 = 1.4 V, VG24 < 50 mV for the LV CCPS). The relation (40) have been derived assuming β25R6|Vt25| ≫ 1, VB7 + Vt25 ≫ VG25, and 2β25R6(VB7 + Vt25) ≫ 1 (β25 ≈ 0.5 mA/V2, R6 = 20 kΩ, Vt25 = − 1.35 V, VB7 = 3.15 V, VG24 < 100 mV for the HV CCPS, and β25 ≈ 30 mA/V2, R6 = 20 kΩ, Vt25 = − 0.74 V, VB7 = 1.39 V, VG25 < 50 mV for the LV CCPS). Using (34), (39), and (40) the following expression can be derived for the offset voltage VOFFSF2 caused by the imperfections of the source followers made by M24 and M25
Using the following substitutions: ΔVt2425 = Vt24 − Vt25, Vt2425 = (Vt24 + Vt25)/2, Δβ2425 = β24 − β25, β2425 = (β24 + β25)/2, ΔR56 = R5 − R6, R56 = (R5 + R6)/2, ΔVB67 = VB6 − VB7, VB67 = (VB6 + VB7)/2, the relation (41) is transformed into the following form
The relation (42) have been derived using the following approximation: (1 + x)1/2 ≈ 1 + x/2, for x ≪ 1. The temperature coefficient the offset voltage VOFFSF2 (42) caused by the imperfections of the source followers made by M24 and M25 can be calculates as follows:
Using (42), the relation (43) becomes
The derivation of the offset voltage VOFFDA2 caused by the imperfections of the differential pair M15–M16 is similar to that in [20]. However, because the channel length modulation of M15, M16, M19, and M20 can be neglected thanks to the telescopic design, this derivation is slightly different compared to [20], where a differential pair with simple current mirror load is discussed.
With sufficiently small biasing voltage VB2 = VB5, drain-to-source voltages VDS15 and VDS16 of M15 and M16, respectively, are small enough to neglect the influence of the channel length modulation in these MOSFETs. So, assuming a simple quadratic model, the gate-to-source voltages VGS15 and VGS16 of M15 and M16, respectively, are given by
Using (35), (45), and (46) the following expression can be derived for the offset voltage VOFFDA2 caused by the imperfections of the differential pair M15–M16
Using the following substitutions: ΔVt1516 = Vt15 − Vt16, Δβ1516 = β15 − β16, β1516 = (β15 + β16)/2, ΔΙD1516 = ID15 − ID16, ID1516 = (ID15 + ID16)/2, the relation (47) is transformed into the following form
The relation (48) have been derived using the following approximation: (1 + x)1/2 ≈ 1 + x/2, for x ≪ 1. With sufficiently large biasing voltage VB4, source-to-drain voltages VSD19 and VSD20 of M19 and M20, respectively, are small enough to neglect the influence of the channel length modulation in these MOSFETs. So, assuming a simple quadratic model, the source-to-gate voltages VSG19 and VSG20 of M19 and M20, respectively, are given by
Because VSG19 = VSG20, the following relation can be derived using (49) and (50)
Using the following substitutions: ΔVt1920 = Vt19 − Vt20, Δβ1920 = β19 − β20, β1920 = (β19 + β20)/2, ΔΙD1920 = ID19 − ID20, ID1920 = (ID19 + ID20)/2, the relation (51) is transformed into the following form
The relation (52) have been derived using the following approximation: (1 + x)1/2 ≈ 1 + x/2, for x ≪ 1. Taking into account the fact that the drain currents of M15 and M19 are equal, ID15 = ID19, and that the drain currents of M16 and M20 are equal, ID16 = ID20, the following equalities are valid: ΔID1516 = ΔID1920, ID1516 = ID1920. Hence, the following expression can be derived from the relation (52)
The offset voltage VOFFDA2 caused by the imperfections of the differential pair M15–M16 is obtained using (48) and (53)
The temperature coefficient the offset voltage VOFFDA2 (54) caused by the imperfections of the differential pair M15–M16 can be calculates as follows:
Using (54), the relation (55) becomes
Finally, the temperature coefficient ∂VOFFOA2/∂T = ∂VOFFSF2/∂T + ∂VOFFSDA2/∂T of the offset voltage of OA2 is obtained using the relations (36), (44), and (56)
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Tadić, N., Dervić, A., Erceg, M. et al. A 40 μW–30 mW generated power, 280 Ω–1.68 kΩ load resistance CMOS controllable constant-power source for thermally-based sensor applications. Analog Integr Circ Sig Process 106, 593–613 (2021). https://doi.org/10.1007/s10470-020-01687-w
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DOI: https://doi.org/10.1007/s10470-020-01687-w