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A low power CMOS voltage reference generator with temperature and process compensation

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Abstract

A low power CMOS voltage reference with process compensation is presented in TSMC 0.18-μm standard CMOS technology. Detailed analysis of the process compensation technique is discussed. The circuit is simulated with Spectre. Simulation results show that, without any trimming procedure, the output voltage achieves a maximum deviation of 0.35 % across different process corners. The temperature coefficient of the proposed circuit is 12.7 ppm/°C in a temperature range from −40 to 85 °C and the line sensitivity is 0.036 mV/V with a supply voltage range from 1.2 to 2.5 V under typical condition. The maximum supply current is 390.4 nA at maximum supply voltage and −40 °C. The power supply rejection ratio is −68.3 dB at 100 Hz and 2.5 V without any filtering capacitor.

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Acknowledgments

This work was funded by the special funds for the development of Internet of things of Wuxi in China under project contracts No. 0414B011601130083PB.

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Authors and Affiliations

  1. Center for RFIC and System Technology, School of Communication and Information Engineering, University of Electronic Science and Technology of China, Chengdu, 611731, Sichuan, People’s Republic of China

    Liangbo Xie, Jiaxin Liu, Yao Wang, Yu Han & Guangjun Wen

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  1. Liangbo Xie
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  2. Jiaxin Liu
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  3. Yao Wang
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  4. Yu Han
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  5. Guangjun Wen
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Correspondence to Liangbo Xie.

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Xie, L., Liu, J., Wang, Y. et al. A low power CMOS voltage reference generator with temperature and process compensation. Analog Integr Circ Sig Process 81, 313–324 (2014). https://doi.org/10.1007/s10470-014-0360-7

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  • DOI: https://doi.org/10.1007/s10470-014-0360-7

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