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Wide operation range high-voltage linear regulator chip design

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Abstract

Advancements in electronic technology have led to the emergence of portable devices like smartphones and smartwatches. For these devices, low-power supply management systems are crucial. In this study, the LDO (low-drop) regulator is implemented with TSMC 0.18 um CMOS high-voltage process. This chip is designed based on multi-current mirror circuits to implement a level-shifting circuit for controlling the error amplifier. The new architecture is achieved using the structure of three low-voltage operational amplifiers. The gate voltage of the power transistor is precisely driven by the level-shifting circuit, eliminating the need for a voltage limiting circuit on the power MOS's Vgs, thus enhancing the response time. This chip incorporates a temperature protection circuit that controls the feedback circuit for high-voltage MOS components. When the temperature exceeds a predefined threshold, the output shuts down immediately. Experimental results demonstrate that this chip can output voltages ranging from 3 to 19 V when the input voltage ranges from 3.5 to 20 V. The chip achieves a maximum output current of 1A and a peak conversion efficiency of 89.94%.

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Acknowledgements

The authors would like to thank Taiwan Semiconductor Research Institute (TSRI). Taiwan for supporting chip manufacturing.

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Authors and Affiliations

  1. Department of Electronic Engineering, National Yunlin University of Science and Technology, Douliu City, Yunlin County, 64002, Taiwan

    Shih-Chang Hsia, Ming-Hwa Sheu & Shang-Hsien Wu

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  1. Shih-Chang Hsia
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  2. Ming-Hwa Sheu
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  3. Shang-Hsien Wu
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Contributions

S-HC: idea and paper writer. M-HS: support chip process. S-HW: simulation and test.

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Correspondence to Shih-Chang Hsia.

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Hsia, SC., Sheu, MH. & Wu, SH. Wide operation range high-voltage linear regulator chip design. Electr Eng 106, 2197–2208 (2024). https://doi.org/10.1007/s00202-023-02060-6

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  • DOI: https://doi.org/10.1007/s00202-023-02060-6

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