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High-Performance 1-D and 2-D Inverse DWT 5/3 Filter Architectures for Efficient Hardware Implementation

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Abstract

This paper presents high-performance and memory-efficient hardware architectures for one-dimensional (1-D) and two-dimensional (2-D) inverse discrete wavelet transform (DWT) 5/3 filters. The proposed 1-D filter architecture requires 33% less memory resources and 17% less logic resources than the best state-of-the-art solutions. The proposed 1-D filter architecture has 100% hardware utilization, which is defined as the ratio of the actual computation time to the total processing time, both expressed in numbers of clock cycles. It allows a 7% higher operational frequency and simultaneously has the lowest total power dissipation in comparison with the best state-of-the-art solutions. The proposed 2-D inverse DWT 5/3 architecture, based on the proposed 1-D inverse DWT filter design, provides medium total computing time and output latency, but outperforms the best state-of-the-art solutions for at least 20% in terms of required memory capacity.

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Acknowledgements

This work was partially supported by Ministry of Education, Science and Technology Development of Republic of Serbia under Grant No. TR32039.

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Authors and Affiliations

  1. University of Belgrade — School of Electrical Engineering, Bul. kralja Aleksandra 73, Belgrade, 11120, Serbia

    Goran Savić, Milan Prokin & Vladimir Rajović

  2. School of Electrical and Computer Engineering of Applied Studies, Vojvode Stepe 283, Belgrade, 11000, Serbia

    Dragana Prokin

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  1. Goran Savić
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  2. Milan Prokin
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Correspondence to Goran Savić.

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Savić, G., Prokin, M., Rajović, V. et al. High-Performance 1-D and 2-D Inverse DWT 5/3 Filter Architectures for Efficient Hardware Implementation. Circuits Syst Signal Process 36, 3674–3701 (2017). https://doi.org/10.1007/s00034-016-0477-2

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  • DOI: https://doi.org/10.1007/s00034-016-0477-2

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