Abstract
The adders, multipliers are the essential building blocks for every integrated circuit (IC). Thus, the design of adders and multipliers must inhibit the area, delay, and power-efficient properties. But most of the CMOS-based logic gates are failed to provide these properties in adders, multipliers implementation. To solve this problem, reversible logic gates have been developed at nanotechnology level using the quantum-dot cellular automata properties. The quantum cost for this reversible logic gates very low, thus in this paper reversible logic gates based N-bit adder, N-bit subtractor, N-bit multiplier, and N-bit ALU developed with reconfigurable properties. The effective utilization of these gates provides more flexible nature for ICs. The implementations are conducted in Xilinx ISE environment, the simulation results shows that proposed method is area, power, and delay efficient compared to the conventional approaches.
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Duggi, N., Rajula, S. (2021). Implementation of Low Area ALU Using Reversible Logic Formulations. In: Reddy, A., Marla, D., Favorskaya, M.N., Satapathy, S.C. (eds) Intelligent Manufacturing and Energy Sustainability. Smart Innovation, Systems and Technologies, vol 213. Springer, Singapore. https://doi.org/10.1007/978-981-33-4443-3_44
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DOI: https://doi.org/10.1007/978-981-33-4443-3_44
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