Abstract
Reversibility has extended applications in designing complex circuits. It also addresses power optimization, complexity effectively. This paper has demonstrated the division circuit applicable in ALU’s using reversible logic gates. An Application-specific integrated circuit (ASIC) is used to implement a division circuit. These are integrated circuits that are not used for any general-purpose applications, but they have particular use. ASIC’s functionality is described by the hardware descriptive languages like VHDL or Verilog. The main intention to use reversible logic gates is to optimize the power consumption, avoid loss of information, and increase the system’s performance. Cost parameters like quantum cost, transistor cost, the total number of unused outputs, the total number of gates are calculated. The software used to execute the proposed design is Xilinx ISE 9.2. Verilog coding is used to code the proposed model.
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Koteswaramma, K.C., Shreya, A., Harsha Vardhan, N., Tarun, K., China Venkateswarlu, S., Vijay, V. (2023). ASIC Implementation of Division Circuit Using Reversible Logic Gates Applicable in ALUs. In: Mandal, J.K., Hinchey, M., Rao, K.S. (eds) Innovations in Signal Processing and Embedded Systems. Algorithms for Intelligent Systems. Springer, Singapore. https://doi.org/10.1007/978-981-19-1669-4_11
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DOI: https://doi.org/10.1007/978-981-19-1669-4_11
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