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Design of Delay-Efficient Carry-Save Multiplier by Structural Decomposition of Conventional Carry-Save Multiplier

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Intelligent Systems and Sustainable Computing

Part of the book series: Smart Innovation, Systems and Technologies ((SIST,volume 289))

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Abstract

Multiplication is an essential operation in many signal and image processing applications. In this paper, alternative structures are proposed for binary multiplication using the carry-save addition process by structural decomposition of the conventional carry-save multiplier (CSM). The proposed structures are helpful to achieve parallel computation by reducing the number of levels required to reach the ripple carry adder (RCA) stage. The 8-bit and 16-bit multipliers are designed and coded in Verilog HDL. The functional verification and synthesis of the circuits are done in Xilinx Vivado 2017.2 on target device ‘xc7z010clg400-1’ of the Zynq 7000 family as well as on ‘xc7s50fgga484-1’ of the Spartan 7 family. Further, the performance of the circuits is compared with respect to the number of LUTs and critical path delay.

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Authors and Affiliations

  1. Department of Electronics and Communication Engineering, S. V. University College of Engineering, Sri Venkateswara University, Tirupati, Andhra Pradesh, India

    M. Venkata Subbaiah & G. Umamaheswara Reddy

Authors
  1. M. Venkata Subbaiah
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  2. G. Umamaheswara Reddy
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Editor information

Editors and Affiliations

  1. Malla Reddy University, Hyderabad, India

    V. Sivakumar Reddy

  2. Department of Computer Science Engineering, Jawaharlal Nehru Technological University, Hyderabad, India

    V. Kamakshi Prasad

  3. Federation University at IIBIT, Sydney, NSW, Australia

    D. N. Mallikarjuna Rao

  4. KIIT University, Bhubaneswar, India

    Suresh Chandra Satapathy

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Venkata Subbaiah, M., Umamaheswara Reddy, G. (2022). Design of Delay-Efficient Carry-Save Multiplier by Structural Decomposition of Conventional Carry-Save Multiplier. In: Reddy, V.S., Prasad, V.K., Mallikarjuna Rao, D.N., Satapathy, S.C. (eds) Intelligent Systems and Sustainable Computing. Smart Innovation, Systems and Technologies, vol 289. Springer, Singapore. https://doi.org/10.1007/978-981-19-0011-2_39

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