Hardware-in-the-Loop Assessment Methods

Abstract

The importance of using real-time simulation and hardware-in-the-loop techniques for the domain of power and energy systems is covered by this chapter. A brief overview of the main concepts is provided as well as a method for their integration into a holistic validation framework for testing smart grid systems. Also, corresponding reference implementations are outlined.

1 Introduction

The classical validation workflow in cyber-physical energy system (CPES) assessment is based on mainly two approaches: simulation and real-hardware testing. Simulation provides the advantages of rapidity, flexibility and versatility with no risk to damaging the equipment. Real hardware testing often requires more time and investments and is hard to reconfigure in case of necessity of adaptation, but it allows the consideration of real behaviour and impact of equipment that is usually hard to fully capture in a simulation environment.

Combining the strength of both approaches, advanced validation techniques interfacing real and virtual environment such as: real-time (RT) simulation [2], controller-hardware-in-the-loop (CHIL) and power-hardware-in-the-loop (PHIL) [5] or eventually the combination of both techniques [8] are new and efficient testing methods for Distributed Energy Resource (DER) devices, for manufacturers to adapt their products to the increasingly demanding requirements, as well as for network operators and regulation authorities to establish new testing and certification procedures on a system point of view. In these advanced Hardware-in-the-loop (HIL) techniques, a real hardware setup for a domain (or part of a domain) is coupled with a real-time simulator to allow testing of hardware or software components under realistic conditions. HIL provides the advantage of replacing error-prone or incomplete models with real-world counterparts and the possibility of scalable testing in faulty and extreme conditions. Real-Time Simulation (RTS) and HIL have proven their applicability as the upcoming and future methodology for testing the (future) smart grid, including DER devices and ICT network to form a holistic and modern power system.

In this chapter, HIL methods are considered as potential methods for configuring complex and realistic validation environment for smart grid. We present the necessary considerations in setting up a HIL experiment, i.e. stability assessment and latency compensation and we propose several approaches for the integration of HIL techniques to a holistic testing framework. This chapter can introduce some insights and technical solutions to readers to create more sophisticated and more realistic experiments.

2 HIL Techniques for Validation of Smart Grid Solutions

The usage of HIL techniques in smart grid applications is generally classified into CHIL and PHIL [1, 2]. A general HIL setup consists of three main elements, the RT simulator, the HUT, and the power interface (only in PHIL case) as depicted in Fig. 1. The RT simulator computes the simulation model in real-time and offers Input/Output (I/O) interfaces/channels to reproduce the behaviour of the simulated system under dynamic conditions. The simulator allows designing and performing various test scenarios with a great flexibility.

Fig. 1

Basic elements of a (P)HIL experiment

Controller Hardware-in-the-Loop (CHIL) involves the testing of a device, for example a power converter controller, where signals are exchanged between a Real-Time (RT) simulator and the HUT via its information ports. The interface in that case (CHIL) consists of Analogue to Digital and Digital to Analogue converters and/or digital communication interfaces. Besides control devices as although real-time simulations coupled to other units such as relays, Phasor Measurement Units (PMU) or monitoring devices are usually classified as CHIL. Such devices are validated in a closed-loop environment under different dynamic and fault conditions, therefore enhancing the validation of control and protection systems for power systems and energy components. In contrast, PHIL involves the testing of a device which absorbs or generates electrical power (e.g., Photovoltaic inverter). A power interface is therefore necessary. CHIL allows testing of physical controller devices, such as DER controllers, relays, PMU, etc., while PHIL involves also a wide variety of DER devices and network components such as converter, electric vehicles and corresponding charging equipment (Fig. 1).

Extending the concept of PHIL, also whole micro-grids or distribution grids can be tested in realistic environments. To distinguish the interfacing of single hardware components from the coupling of multi-device power hardware, the term Power System in-the-Loop is introduced (PSIL). In a broader frame, HIL testing can thus be extended to laboratories offering full-scale physical setups in which pure hardware interactions of multiple components and distributed control hardware become part of the experiment. In this sense PSIL challenges the sharp distinction between CHIL and PHIL and offers a future perspective of hybrid experiments of power hardware, a power network configuration, and control hardware/software.

Along with the increased realism of experiment, one major challenge of going from pure simulation to PSIL is the high complexity of implementing real-time compliant interfaces between the different elements/domains (e.g. RTS, controller, electrical components, SCADA system). The issues such as communication latency and stability of the interface must be assessed properly to avoid damage to the physical equipment and to the users.

2.1 Stability of HIL Experiments

Due to the addition of the hardware/simulation interface, thus various external disturbances (especially the time delay), HIL experiments are sensitive in terms of stability and accuracy. Additionally, for PHIL, the power amplification configuration and its impact (I/O boundaries, galvanic isolation, short circuit behaviour, slew-rate, etc.) must be addressed and evaluated as it strongly influences the determination of system stability, bandwidth, and the expected accuracy. Instability in PHIL simulations should be avoided as it can cause irreparable damage to equipment.

2.2 Stability Assessment

The model of a PHIL simulation can be expressed using transfer function in the frequency domain as shown in Fig. 2.

Fig. 2

General representation of a PHIL system

$G_s(s)$, $G_{amp}(s)$ and $G_h(s)$ are the transfer functions of the simulated part, amplifier and hardware part respectively and the exponential term is the representation in the frequency domain of the time delay inserted by the amplifier. The disturbance inserted into the system due to extrinsic factors is noted as d(s).

Using Bode stability criterion the stability conditions can be expressed as:

$|G_s(s)G_{amp}(s)e^{sT_d}G_h(s)|<1$ and $\angle {G_s(s)}+\angle {G_{amp}(s)}+\angle {G_h(s)}-\omega {T_d}=\pi$

Taking into account the uncertainties that occur in different parts of the model of a PHIL simulation the previous inequality related with magnitude of the open transfer function is given by:

$$|G_s(s)G_{amp}(s)e^{sT_d}G_h(s)|<\frac{1}{1+\epsilon }$$

As the parameter $\epsilon$ is, by definition, always bigger than zero, the value of the fraction of the right part of the inequality is smaller than unity. Thus, one can conclude that when there are unmodeled parts in the system intentionally or not, then the stability criterion of the analysis should be stricter. From a practical point of view, we apply a more conservative method in order to examine the bounds of the stability of the system and to derive safe results even in the worst-case scenario. Moreover, based on the Bode stability criterion the marginal parameters of a PHIL experiment (to achieve stability) can be determined without using approximations for the time delay. The proposed analysis has been applied to existing methods to achieve stability in [7].

2.3 Approaches for the Compensation of Time Delay

The time delay presented in HIL simulations directly affects the phase relationship of the signals exchanged at the point of common coupling and accordingly the power factor of the HUT seen by the simulation platform [3, 6, 14]. Furthermore, this effect will not only be present at the fundamental frequency but also at any harmonic component present in the simulation, hence the time delay in these harmonic components should also be reduced or compensated.

The action of compensating the time delay aims to achieving a waveform which is in phase and has the same amplitude as that of an ideal system (without PHIL interface). With this purpose, different approaches exist which by the application of a filter or a phase-shift results in a non-delayed waveform. When a phase-shift is applied, this needs to be applied to all the harmonic components of the waveform for an accurate solution. The main approaches used for the compensation of time delay are:

• Fourier compensation: by applying Fourier transformation to the signals, the phasors of the harmonic components can be identified. Then, the time delay compensation can be performed by leading the phase for each harmonic of interest [3].

• Lead compensator: this function can be used for approximating the interface to an ideal interface in terms of phase and gain [12, 13]. This approach is susceptible of amplifying high frequency noise and can be limited when harmonic components are present or the system under test is complex.

• Direct-quadrature-zero (dq0) transformation: different harmonic components can be identified with the dq0 transformation, which can be independently compensated with the addition of the time delay to the inverse dq0 transformation [6]. However, this approach relies in noise free and balanced three phase waveforms and can be computationally expensive if large number of harmonics are required.

• Synchronous generator control compensation: phase compensation can be introduced in the control algorithm of the synchronous generator when it is used as the power amplifier for PHIL [14].

Complimentary to the time delay compensation, to achieve improved transient dynamics in PHIL simulations the total time delay has to be minimized. This can be achieved by (i) minimizing the time step of the real time simulation, (ii) reducing time delays introduced by the power amplifiers, (iii) improving the communication channels used (with fast digital communications rather than analogue communication), and (iv) avoiding the use of components that add significant delays such as filters.

3 Integration of HIL Techniques into a Holistic Framework

By the date of publication of this book and to the extent of the authors knowledge, there are no off-the-shelf tools available for testing complex smart grid applications that involve components from different domains. In order to achieve a complete validation of the multi-domain and large-scale smart grid, HIL techniques can be combined with other simulations and with other infrastructures. The idea of integrating real-time based HIL to a holistic framework provides the basis of the subsequent ERIGrid’s approaches. With these solutions, an integral view of the behaviour of the communication network and the states of the power system may be achieved.

3.1 Simulation Message-Bus Based Solutions: Lab-Link and OPSIM

The principal architecture of an Simulation Message Bus (SMB)-based co-simulation is presented in Fig. 3. In this configuration, the main component is represented by the simulation data bus. Input and output interfaces are packed around the core and act as a middle layer allowing data structures to be injected or extracted from the message bus. Depending on the sample rate at which data needs to be exchanged with the core, specifically designed task processing units will be needed for the purpose of the respective application.

These task processing units represent functional units which are typically implemented in software and are labelled as $\text {IN}_{\text {O1}}$, $\text {IN}_{\text {O2}}$, $\text {IN}_{\text {O3}}$, $\dots$ $\text {IN}_{\text {O}N}$ in Fig. 3. Their primary function is to design custom software or hardware adaptations for each application or simulator that participates. The SMB may be modified in the course of the development of various co-simulation tools.

Fig. 3

Simulation message bus architecture for co-simulation of real-time and non-real-time systems

Lablink is a software package based on SMB, as indicated before. The purposely designed communication middleware allows for fast and simple coupling of software and hardware components. Mainly, Lablink enables different devices integrated in an electric power laboratory such as power sources, loads, grid emulators, or measurement devices to establish a bidirectional data and control signal flow. Figure 4 shows the basic structure of the Lablink applicable for real-time and non real-time simulation. The left part highlights N offline simulation tasks with time step sizes assumed in the ranges of $t_{\text {S,O}i}\in [100~\mathrm{ms}; 2~\mathrm{s}]$. All mentioned tasks are connected to the Lablink structure in an independent and bidirectional way with respect to signal or data exchange. The range of the time step sizes may heavily vary based on the type of offline simulation. However, typical values are proposed in Fig. 4 for simulation setups related to investigations in the electrical domain.

Fig. 4

Lablink structure for real-time and non real-time CHIL applications with indicated sample rates

As highlighted in the SMB architecture shown in Fig. 4, Lablink is processing incoming and outgoing data from offline simulation tasks and from the linked DRTS, respectively. In this case, minimum time step sizes of $t_{\text {S,LL}} = 1$ ms are specified as sample rates for Lablink. However, the real-time computing system has fixed time step sizes due to the inherent constraint of real-time simulation. For CHIL applications, the DRTS typically runs with a time step size in the range of $t_{\text {S,RT}i}\in [100~\mathrm{ns}; 1~\mathrm{ms}]$. Sample rates of less than 1 $\upmu$s are required for simulation tasks emulating PWM signals for control application.

As shown in Fig. 4, the real-time machine on the right side is linked to one or several interface boards. The interfacing boards represent functional units between machine controller implemented in hardware and the DRTS system. The number of signals exchanged between the controller and the DRTS may be high. At least, it is higher than the number of signals exchanged between offline tasks and Lablink for typical CHIL applications related to converter control simulations. The maximum specified time step size $t_{\text {S,CI}i}$ referring to the controller interface is set by 10 $\upmu$s.

Fig. 5

OpSim solution architecture

OpSim (Fig. 5), another SMB-based solution, enables users to connect their software to simulated power systems or test it in conjunction with other software. The core of OpSim is a flexible message bus architecture; it allows arbitrary co-simulations in which power system simulators, controllers and operative control software can be coupled together. The OpSim Message Bus works as a unidirectional buffer with validity during a time window defined by the publish rate $T_x$ of the simulator which has write privileges on the variable/vector to exchange. This time window prevents corruption or overwriting of the information from external sources and ensures a real-time simulation according to each simulator publish rate. This leads to defining a variable for each simulator-to-simulator value exchange, as can be seen in the Fig. 6.

Fig. 6

OpSim Message Bus data handling with two simulators

3.2 Online Integration with SCADA as a Service Approach

In this approach, a hybrid cloud server (Fig. 7) is used as the intermediate buffer for information exchange among elements of a holistic test. In order to improve interoperability and reusability of the developed models, the Functional Mock-up Interface (FMI) standard can be integrated. This approach allows the integration of RTS to multiple hardware (SCADA, DER, etc.) and software (simulators). The synchronization is configured to satisfy the conditions in [10].

Fig. 7

Multi-infrastructure integration via SCADA as a service approach [11]

3.3 Quasi-static PHIL/PSIL

The Quasi-static HIL approach addresses applications in the smart grid context that do not require very fast analysis, such as optimization evaluation or use of secondary control. In these applications, the requirements of hardware and associated simulators need not comply with strict real-time requirements. As an example, for investigating voltage support controllers in distribution grids, this variant of the PSIL approach could couple a real power system, e.g. a LV feeder, to a simulated grid, e.g. MV grid with multiple feeders, and associated controllers. Since the objective of the experiment does not directly address fast phenomena, the investigation can proceed with a relaxed real-time constraint and the integration of slower, non-real-time, simulations into HIL. Under assumption of the relaxed testing requirements outlined in [10] and the extension of supported domain couplings and software interfaces, there is thus room for a relaxed variant of hardware-software coupling in laboratory experiments, which we summarize under the term “Quasi-static Power Hardware In-the-Loop” (QsPHIL) [9].

Testing smart grid solutions under QsPHIL should be seen as complementary to PHIL and CHIL testing: (a) since QsPHIL assumes that the electrical grid can be treated as quasi-stationary, QsPHIL implicitly assumes that the effects of transients and stability can be neglected, and (b) due to lower fidelity requirements of simulator and coupling hardware, relaxed precision and cost requirements make PSIL and multi-domain experiments more flexible, allowing for a wider range and scope of experimental hardware to be integrated.

Thus, in a testing chain, QsPHIL testing would typically follow after PHIL and CHIL tests of individual hardware components or assume maturity of power hardware and fast control components. The approach can also be assumed to cover field test implementation in a controlled laboratory environment, making it suitable as an intermediate step or partial replacement before field deployment. This is particularly true for validation of complex control systems, where implementation errors can be caught before field deployment, reducing the cost of managing these errors. Further, the reduced requirements of QsPHIL suit applications for the remote integration of laboratories using non-dedicated communication links and hardware equipment, as reported in the following section and Sect. 5.4.5.

4 Coordinated Voltage Control of a Microgrid Example

To demonstrate the application and the integration of HIL to a co-simulation framework, a test-case of coordinated voltage control (CVC) of a benchmark microgrid [4] is implemented in CHIL manner (via (Lab-link and OpSim architecture) and then in PHIL-PSIL manner (via SCADA-as-a-service approach). The benchmark microgrid (modified from the CIGRE LV grid) is governed by a CVC algorithm aiming to minimize bus voltage deviation, power loss and the number of tap change by the OLTC (Fig. 8). The objective of the test-case is validating the performance of the CVC algorithm and demonstrating the implementation of a complex and realistic validation environment using HIL techniques.

Fig. 8

The benchmark microgrid and the CVC algorithm

4.1 CHIL Implementation via Lab-Link

The first demonstration is implemented in a single infrastructure (AIT Austrian Institute of Technology—Austria). The lab-link architecture is used to implement the test-case, linking the microgrid model in real-time simulation (by OPAL RT), and the controller (in Matlab) (Fig. 9).

Fig. 9

Implementation of the test-case with Lab-link architecture

The bus voltage in the microgrid is then regulated according to the three optimization criteria (Fig. 10).

Fig. 10

Bus voltage at different grid nodes as regulated by the CVC algorithm

Fig. 11

Cross-Infrastructure implementation with OPSim and results (PV Reactive Power and Bus voltages

4.2 Multi-platform CHIL Implementation via OpSim Architecture

Using the OpSim environment, the test-case is implemented in a multi-infrastructure manner, with the microgrid simulated by OPAL RT and connected directly to the OpSim message bus at Fraunhofer IEE in Kassel—Germany and the controller running in Matlab at National Technical University of Athens—Greece, connected to the co-simulation environment via the OpSim web interface (Fig. 11).

The result in Fig. 11 shows slight deviations of voltage with respect to the single platform implementation, demonstrating (i) the combination of expertise and equipment of the two infrastructures in a holistic test and allowing (ii) the consideration of latency’s impact to the performance of the control. In this case, the CVC algorithm still shows good performance despite of the influence of latency between the two platforms (Fig. 11).

4.3 PHIL and PSIL Implementation in PRISMES Platform

The behaviour of the proposed CVC algorithm is then tested in a more realistic environment, a real microgrid in PRISMES platform (Commissariat of Atomic Energy and Alternative Energies—CEA France). The experiment is implemented with a PHIL part interfacing a physical load and a PV inverter (PV 4 and Load 5) with the real-time simulator OPAL RT mimicking the real microgrid behaviours via its SCADA system (SCADA-as-a-service approach). The setup can be considered as an approach of Power-System-In-The-Loop (PSIL). In this case, the loads 1–4 (Fig. 8) are replaced with the digital twins of 4 experimental smart houses INCAS and the PV pack from 1 to 3 are replaced with the digital twins of three real PV packs (20-20-60 monocristalin panels and inverters) in PRISMES platform (Fig. 12).

Fig. 12

The houses and PV packs considered in the microgrid

To this purpose, the digital twins of the equipment are replicated in real-time simulation with the OP5700 RT simulator with their measurements synchronized from the SCADA System. The synchronization step for each measure is chosen according to the conditions proposed in [10] and with respect to: 1/ Physical sampling time of the physical sensors, 2/ Latency between the SCADA server and the RT Simulator. The RT simulator are also responsible for simulating the equipment that are not physically available in the platform (i.e. OLTC and BESS). Moreover, to facilitate the study on impact of the CVC algorithm on radial ends of the microgrid, load 5 and PV 4 are replaced with real equipment (1 PV pack with SMA inverter and 1 load Cinegia) (Fig. 13) and are connected to the grid via the PHIL interface (Fig. 14). The inclusion of PHIL part also allows consideration of more advanced functionalities of the integrated hardware (e.g. Fault-ride-through or anti-islanding).

Fig. 13

The PV inverter and the load in PHIL integration

Fig. 14

The RT simulator OP5700 and the Puissance+ Power Amplifier used in the PHIL interface

The proposed PSIL setup presents several advantages and is much more realistic and challenging for testing the CVC for the following reasons:

• The combination of simulation and real equipment provides great flexibility in configuring complex, yet realistic validation environments.

• The PV production and loads reflect exactly a real deployment environment (irradiation angle, weather condition, load demand, etc.)

• The real-time digital twins is synchronized with real measurement from the SCADA system, which is much more intermittent and is subjected to a wide range of disturbance from the communication network and the SCADA service itself.

• All the INCAS houses are energy positive (equipped with rooftop PV). So the microgrid presents a very high PV penetration rate.

The CVC algorithm is then applied to this PSIL setup to control the microgrid voltage according to the desired criteria (Fig. 15). OLTC and BESS (virtual equipment) are regulated together with the reactive power of PV inverter (real equipment in PHIL and digital twins of real equipment) to act on the bus voltages, deviated by the PV production and load. The impact of PV injection can be studied as the voltage increases on radial ends (i.e. PV 4 and load 5).

Fig. 15

The CVC algorithm regulates the microgrid voltage according to the desired criteria w.r.t real PV production and consummation

The three selected test-cases represented different levels of validation of a CVC algorithm, from CHIL to CHIL with consideration of latency and finally PHIL and PSIL setup. They demonstrate the potential applications of RTS and HIL techniques in configuring complex and realistic validation environments for smart grid, according to user’s needs.

5 Summary

CPES constitute a significant challenge for system testing and validation. In this chapter, the development of HIL experiments to tackle the validation and assessment of holistic and complex smart grid scenarios were presented, along with its associated laboratory environment. These solutions, involving advanced techniques such as integration with co-simulation, stability assessment and time delay compensation, provide flexible and equally reliable testing environments for various smart grid setups with different degrees of complexity. They are demonstrated via three selected test-cases representing different implementation levels of hardware inclusion, from CHIL to PHIL and PSIL.