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Scanning Capacitance Microscopy for Two-Dimensional Carrier Profiling of Semiconductor Devices

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Electrical Atomic Force Microscopy for Nanoelectronics

Part of the book series: NanoScience and Technology ((NANO))

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Abstract

As the semiconductor technology matures from research to development and eventually entering manufacturing, there is a consistent focus on reducing defects and yield detractors. This results in engineers utilizing the Failure Mode and Effects Analysis (FMEA) duplicate of integrated circuits. In failure analysis (FA) of integrated circuits, Scanning Capacitance Microscopy (SCM) has been used to identify failure mechanisms, such as regions of incorrect doping and electrical shorts, thereby indicating the appropriate corrective actions required to remedy the device. Because sample preparation and data interpretation are relatively straightforward, FA applications of SCM can be performed with quick turnaround and with few ambiguities that can arise in quantitative applications. In this chapter, we will focus on SCM applications, highlighting work performed at the state-of-the-art chip manufacturing facility of GLOBALFOUNDRIES.

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Acknowledgements

The authors acknowledge K. Barton, T. Su and C. Molella for their skillful sample preparation, Justin Clements and Danielle Clements for proof-reading and Globalfoundries for providing the support with this chapter.

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Authors and Affiliations

  1. GLOBALFOUNDRIES, 400 Stone Break Rd Extension, Malta, NY, 12020, USA

    Jay Mody & Jochonia Nxumalo

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  1. Jay Mody
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  2. Jochonia Nxumalo
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Correspondence to Jay Mody .

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Editors and Affiliations

  1. IMEC, Leuven, Belgium

    Umberto Celano

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Mody, J., Nxumalo, J. (2019). Scanning Capacitance Microscopy for Two-Dimensional Carrier Profiling of Semiconductor Devices. In: Celano, U. (eds) Electrical Atomic Force Microscopy for Nanoelectronics. NanoScience and Technology. Springer, Cham. https://doi.org/10.1007/978-3-030-15612-1_4

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